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W83977EF-AW Datasheet(PDF) 50 Page - Winbond

Part # W83977EF-AW
Description  WINBOND ISA I/O
Download  142 Pages
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Manufacturer  WINBOND [Winbond]
Direct Link  http://www.winbond.com
Logo WINBOND - Winbond

W83977EF-AW Datasheet(HTML) 50 Page - Winbond

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W83977EF-AW/W83977EG-AW
-48-
6.2.3
Handshake Control Register (HCR) (Read/Write)
This register controls the pins of the UART used for handshaking peripherals such as modem, and
controls the diagnostic mode of the UART.
0
0
0
0
1
2
3
4
5
6
7
Data terminal ready (DTR)
Request to send (RTS)
Loopback RI input
IRQ enable
Internal loopback enable
Bit 4: When this bit is set to a logical 1, the UART enters diagnostic mode by an internal loopback, as
follows:
(1) SOUT is forced to logical 1, and SIN is isolated from the communication link instead of the
TSR.
(2) Modem output pins are set to their inactive state.
(3) Modem input pins are isolated from the communication link and connect internally as DTR
(bit 0 of HCR)
→DSR#, RTS ( bit 1 of HCR) →CTS#, Loopback RI input ( bit 2 of HCR) →
RI#and IRQ enable ( bit 3 of HCR)
→DCD#.
Aside from the above connections, the UART operates normally. This method allows the
CPU to test the UART in a convenient way.
Bit 3: The UART interrupt output is enabled by setting this bit to a logic 1. In the diagnostic mode this
bit is internally connected to the modem control input DCD#.
Bit 2: This bit is used only in the diagnostic mode. In the diagnostic mode this bit is internally
connected to the modem control input RI#.
Bit 1: This bit controls the RTS# output. The value of this bit is inverted and output to RTS#.
Bit 0: This bit controls the DTR# output. The value of this bit is inverted and output to DTR#.
6.2.4
Handshake Status Register (HSR) (Read/Write)
This register reflects the current state of four input pins for handshake peripherals such as a modem
and records changes on these pins.
1
2
3
4
5
6
70
RI falling edge (FERI)
Clear to send (CTS)
Data set ready (DSR)
Ring indicator (RI)
Data carrier detect (DCD)
CTS# toggling (TCTS)
DSR# toggling (TDSR)
DCD# toggling (TDCD)
Bit 7: This bit is the opposite of the DCD# input. This bit is equivalent to bit 3 of HCR in loopback
mode.


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