LC87F06J2A

No.A0432-25/32

VDD1, VSS1 Terminal condition

It is necessary to place capacitors between VDD1 and VSS1 as describe below.

• Place capacitors as close to VDD1 and VSS1 as possible.

• Place capacitors so that the length of each terminal to the each leg of the capacitor be equal (L1 = L1’, L2 = L2’).

• Place high capacitance capacitor C1 and low capacitance capacitor C2 in parallel.

• Capacitance of C2 must be more than 0.05

µF.

• Use thicker pattern for VDD1 and VSS1.

VDDVCO, VSSVCO Terminal condition

It is necessary to place capacitors between VDDVCO and VSSVCO as describe below.

• Place capacitors as close to VDDVCO and VSSVCO as possible.

• Place capacitors so that the length of each terminal to the each leg of the capacitor be equal (L3 = L3’, L4 = L4’).

• Place high capacitance capacitor C3 and low capacitance capacitor C4 in parallel.

• Capacitance of C4 must be more than 0.05

µF.

• Use thicker pattern for VDDVCO and VSSVCO.

VSS1

VDD1

L1’

L2’

L1

L2

C1

C2

VSSVCO

VDDVCO

L4’

L3’

L4

L3

C3

C4