LC87F06J2A

No.A0432-24/32

Automatic transmission output characteristics

at Ta = -20°C to +70°C, VSS1 = VSS2 = VSS3 = VSS4 = VSSVCO = 0V

Specification

Parameter

Symbol

Pins/

Remarks

Conditions

VDD[V]

min

typ

max

unit

Frequency

tSCK(9)

4

tSCKL(9)

2

Low level

pulse width

tSCKLA(9)

2

tSCKH(9)

2

tSCKHA(9)

See fig. 8.

• (Note10-1)

2

tBLKSEP(9a)

See fig. 8.

• Transfer continuous data blocks

• (Note10-1)

4

High level

pulse width

tBLKSEP(9b)

SCK7(PA2),

See fig. 8.

• Transfer continuous data blocks with

skipping S-number of data blocks

• (Note10-1)

4.5 to 5.5

4+

(2/3) •S

Frequency

tSCK(10)

26/3

tCYC

tSCKL(10)

1/2

Low level

pulse width

tSCKLA(10)

1/2

tSCKH(10)

1/2

High level

pulse width

tSCKHA(10)

SCK7(PA2),

• CMOS output selected

• See fig. 8.

• (Note10-1)

4.5 to 5.5

1.5

tSCK

Output delay

time

tdDO(8)

SB7(PA1)

• Must be specified with

respect to falling edge of SIOCLK

• Must be specified as the time to the

beginning of output state change in

open drain output mode.

• See fig. 8.

4.5 to 5.5

1tCYC

+0.05

µs

Note10-1: When starting transmission, a time from ECST begin set when serial clock is “H” to the first negative edge

of serial clock must be longer than the following.

(4 + (2/3) • S) • tCYC

S: Skipping number of data block when starting transmission.