LC87F06J2A

No.A0432-17/32

Continued from preceding page.

Specification

Parameter

Symbol

Pins/

Remarks

Conditions

VDD[V]

min

typ

max

unit

tdDO(1)

• Continuous data

transmission/reception mode

• (Note 4-1-3)

(1/3)tCYC

+0.05

tdDO(2)

• Synchronous 8-bit mode.

• (Note 4-1-3)

1tCYC

+0.05

Output delay

time

tdDO(3)

SO0(P10),

SB0(P11)

• (Note 4-1-3)

2.7 to 5.5

(1/3)tCYC

+0.05

µs

Note 4-1-3: Must be specified with respect to falling edge of SIOCLK. Must be specified as the time to the beginning of

output state change in open drain output mode. See Fig. 6.

2. SIO1 Serial I/O Characteristics (Note 4-2-1)

Specification

Parameter

Symbol

Pins/

Remarks

Conditions

VDD[V]

min

typ

max

uni

Frequency

tSCK(3)

2

Low level

pulse width

tSCKL(3)

1

High level

pulse width

tSCKH(3)

SCK1(P15)

• See Fig. 6.

2.7 to 5.5

1

Frequency

tSCK(4)

2

tCYC

Low level

pulse width

tSCKL(4)

1/2

High level

pulse width

tSCKH(4)

SCK1(P15)

• CMOS output selected.

• See Fig. 6.

2.7 to 5.5

1/2

tSCK

Data setup time

tsDI(2)

0.03

Data hold time

thDI(2)

SI1(P14),

SB1(P14)

• Must be specified with respect

to rising edge of SIOCLK

• See fig. 6.

2.7 to 5.5

0.03

Output delay time

tdDO(4)

SO1(P13),

SB1(P14)

• Must be specified with respect

to falling edge of SIOCLK

• Must be specified as the time

to the beginning of output state

change in open drain output

mode.

• See Fig. 6.

2.7 to 5.5

(1/3)tCYC

+0.05

µs

Note 4-2-1: These specifications are theoretical values. Add margin depending on its use.