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CY7C199N
Document #: 001-06493 Rev. **
Page 3 of 10
ISB1
Automatic CE
Power-down Current—
TTL Inputs
Max. VCC, CE > VIH,
VIN > VIH or VIN <
VIL, f = fMAX
Com’l
30
30
25
25
mA
L5
5
5
5
mA
ISB2
Automatic CE
Power-down Current—
CMOS Inputs
Max. VCC,
CE > VCC – 0.3V
VIN > VCC – 0.3V or
VIN < 0.3V, f = 0
Com’l
10
10
10
10
mA
L
0.05
0.05
0.05
0.05
mA
Mil
15
15
15
15
mA
Capacitance[4]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VCC = 5.0V
8pF
COUT
Output Capacitance
8
pF
AC Test Loads and Waveforms[5]
Data Retention Characteristics Over the Operating Range (L-version only)
Parameter
Description
Conditions[6]
Min.
Max.
Unit
VDR
VCC for Data Retention
2.0
V
ICCDR
Data Retention Current
Com’l
VCC = VDR = 2.0V,
CE > VCC – 0.3V,
VIN > VCC – 0.3V or
VIN < 0.3V
µA
Com’l L
10
µA
tCDR
[4]
Chip Deselect to Data Retention Time
0
ns
tR
[5]
Operation Recovery Time
200
µs
Electrical Characteristics Over the Operating Range[3]
Parameter
Description
Test Conditions
-20
-25
-35
-55
Unit
Min. Max. Min. Max. Min. Max.
Min.
Max.
3.0V
5V
OUTPUT
R1 481
Ω
R2
255
Ω
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
≤t
r
≤t
r
5V
OUTPUT
R1 481
Ω
R2
255
Ω
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
1.73V
Equivalent to:
THÉVENIN EQUIVALENT
ALL INPUT PULSES
167
Ω
Data Retention Waveform
Note:
4. Tested initially and after any design or process changes that may affect these parameters.
5. tR< 3 ns for the -12 and the -15 speeds. tR< 5 ns for the -20 and slower speeds
6. No input may exceed VCC + 0.5V.
3.0V
3.0V
tCDR
VDR > 2V
DATA RETENTION MODE
tR
CE
VCC
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