Philips Semiconductors Linear Products

Product specification

UC3842

Current-mode PWM controller

August 31, 1994

1105

OPEN-LOOP LABORATORY TEST FIXTURE

NOTE:

High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to Pin 5 in a single point

ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Pin 3.

4.7k

ERROR AMP

ADJUST

4.7k

2N2222

100k

5k

ADJUST

COMP

1

2

3

4

8

7

6

5

OUTPUT

GND

1k

1W

OUTPUT

GND

VREF

VCC

RT

UC3842

VFB

ISENSE

RT/CT

VREF

VCC

0.1

µF

ISENSE

CT

A

0.1

µF

SHUTDOWN TECHNIQUES

NOTE:

Shutdown of the UC3842 can be accomplished by two methods; either raise Pin 3 above 1V or pull Pin 1 below a voltage two diode drops above ground. Either method causes the

output of the PWM comparator to be high (refer to Block Diagram). The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdown

condition at Pins 1 and/or 3 is removed. In the examples shown, an externally-latched shutdown may be accomplished by adding an SCR which will be reset by cycling

VCC below the lower UVLO threshold (10V). At this point all internal bias is removed, allowing the SCR to reset.

1

COMP

SHUTDOWN

TO CURRENT

SHUTDOWN

SENSE RESISTOR

4.7k

4.7k

8

3

500

ISENSE