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AME1117ACBT Datasheet(PDF) 10 Page - Analog Microelectronics |
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AME1117ACBT Datasheet(HTML) 10 Page - Analog Microelectronics |
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10 / 19 page  AME, Inc. 10 1A Low Dropout Positive Voltage Regulator AME1117 Rev.S.02 1. Output Voltage Adjustment Like most regulators, the AME1117 regulates the out- put by comparing the output voltage to an internally gen- erated reference voltage. On the adjustable version, the V REF is available externally as 1.25V between VOUT and ADJ. The voltage ratio formed by R1 and R2 should be set to conduct 10mA (minimum output load). The output voltage is given by the following equation: V OUT = VREF ( 1 + ) + I ADJ x R2 On fixed versions of AME1117, the voltage divider is provided internally. n Application Description R2 R1 2. Thermal Protection AME1117 has thermal protection which limits junction temperature to 150oC. However, device functionality is only guaranteed to a maximum junction temperature of +125oC. The power dissipation and junction temperature for AME1117 is given by P D = (VIN - VOUT) x IOUT T JUNCTION = TAMBIENT + ( PD x θJA) Note: T JUNCTION must not exceed 125 oC 3. Current Limit Protection AME1117 is protected against overload conditions. Cur- rent protection is triggered at typically 1.5A. 4. Stability and Load Regulation AME1117 requires a capacitor from V OUT to GND to pro- vide compensation feedback to the internal gain stage. This is to ensure stability at the output terminal. Typi- cally, a 10 µF tantalum or 50µF aluminum electrolytic is sufficient. (Note: It is important that the ESR for this capacitor does not ex- ceed 0.5 Ω.) The output capacitor does not have a theoretical upper limit and increasing its value will increase stability. C OUT = 100 µF or more is typical for high current regulator de- sign. For the adjustable version, the best load regulation is accomplished when the top of the resistor divider (R1) is connected directly to the output pin of the AME1117. When so connected, R P is not multiplied by the divider ratio. For fixed output versions, the top of R1 is internally connected to the output. The ground pin can be connected to the low side of the load in order to eliminate ground loop errors. OUT ADJ IN V IN R1 R2 R L R P Parasitic Line Resistance Connect R2 to load (Connect R1 to case) V OUT = VREF (1+ R2 R1 ) + I ADJ x R2 OUT ADJ IN V REF I ADJ 55 µA V IN V OUT R1 R2 C 1 |
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