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TDA4853 Datasheet(PDF) 28 Page - NXP Semiconductors |
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TDA4853 Datasheet(HTML) 28 Page - NXP Semiconductors |
28 / 60 page 1999 Jul 13 28 Philips Semiconductors Product specification I2C-bus autosync deflection controllers for PC/TV monitors TDA4853; TDA4854 Fig.7 Adjustment of vertical linearity (vertical S-correction). (1) ∆I1 is the maximum amplitude setting at register VSIZE = 127 and VLIN = 0%. VLIN I ∆ 1 I ∆ 2 – I 1 ∆ ---------------------- 100% × = handbook, halfpage t IVOUT1 IVOUT2 ∆l 2/∆t ∆l 1 (1)/∆t MBG594 Fig.8 Adjustment of vertical linearity balance. (1) ∆I 1 is the maximum amplitude setting at register VSIZE = 127, register VOVSCN = 0, control bit VPC = 1, control bit VLIN = 1 and control bit VLINBAL = 0. VLINBAL I ∆ 1 I ∆ 2 – 2I 1 ∆ × ---------------------- 100% × = handbook, halfpage t IVOUT1 IVOUT2 ∆I1(1) ∆I2 MGM068 Fig.9 Adjustment of parabola amplitude at pin EWDRV. handbook, halfpage t VEWDRV VHPIN(EWDRV) MGM069 Fig.10 Influence of corner correction at pin EWDRV. handbook, halfpage t VEWDRV VHCOR(EWDRV) MGM070 |
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