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TDA4853 Datasheet(PDF) 21 Page - NXP Semiconductors |
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TDA4853 Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 60 page  1999 Jul 13 21 Philips Semiconductors Product specification I2C-bus autosync deflection controllers for PC/TV monitors TDA4853; TDA4854 CVAGC external capacitor at VAGC (pin 22) 150 − 220 nF Differential vertical current outputs ADJUSTMENT OF VERTICAL SIZE INCLUDING VGA AND EHT COMPENSATION; see Fig.5 VSIZE vertical size without VGA overscan (referenced to nominal vertical size) register VSIZE = 0; bit VOVSCN = 0; note 8 − 60 − % register VSIZE = 127; bit VOVSCN = 0; note 8 − 100 − % VSIZEVGA vertical size with VGA overscan (referenced to nominal vertical size) register VSIZE = 0; bit VOVSCN = 1; note 8 − 70 − % register VSIZE = 127; bit VOVSCN = 1; note 8 115.9 116.8 117.7 % VSMODEHT EHT compensation on vertical size via VSMOD (pin 21) (referenced to 100% vertical size) IVSMOD =0 − 0 − % IVSMOD = −120 µA −−7 − % Ii(VSMOD) input current (pin 21) VSMOD = 0 − 0 −µA VSMOD = −7% −−120 −µA Ri(VSMOD) input resistance 300 − 500 Ω Vref(VSMOD) reference voltage at input − 5.0 − V fro(VSMOD) roll-off frequency ( −3 dB) IVSMOD = −60 µA +15 µA (RMS) 1 −− MHz ADJUSTMENT OF VERTICAL POSITION; see Fig.6 VPOS vertical position (referenced to 100% vertical size) register VPOS = 0; control bit VPC = 0 −−11.5 − % register VPOS = 127; control bit VPC = 0 − 11.5 − % register VPOS = X; control bit VPC = 1 − 0 − % ADJUSTMENT OF VERTICAL LINEARITY; see Fig.7 VLIN vertical linearity (S-correction) register VLIN = 0; control bit VSC = 0; note 8 − 2 − % register VLIN = 15; control bit VSC = 0; note 8 − 46 − % register VLIN = X; control bit VSC = 1; note 8 − 0 − % δVLIN symmetry error of S-correction maximum VLIN −−±0.7 % SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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