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TDA4853 Datasheet(PDF) 17 Page - NXP Semiconductors |
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TDA4853 Datasheet(HTML) 17 Page - NXP Semiconductors |
17 / 60 page 1999 Jul 13 17 Philips Semiconductors Product specification I2C-bus autosync deflection controllers for PC/TV monitors TDA4853; TDA4854 Automatic polarity correction for vertical sync tW(VSYNC)(max) maximum width of vertical sync pulse −− 400 µs td(VPOL) delay time for changing polarity 0.45 − 1.8 ms Video clamping/vertical blanking output: pin CLBL tclamp(CLBL) width of video clamping pulse measured at VCLBL = 3 V 0.6 0.7 0.8 µs Vclamp(CLBL) top voltage level of video clamping pulse 4.32 4.75 5.23 V TCclamp temperature coefficient of Vclamp(CLBL) − 4 − mV/K STPSclamp steepness of slopes for clamping pulse RL =1MΩ; CL =20pF − 50 − ns/V td(HSYNCt-CLBL) delay between trailing edge of horizontal sync and start of video clamping pulse clamping pulse triggered on trailing edge of horizontal sync; control bit CLAMP = 0; measured at VCLBL =3V − 130 − ns tclamp1(max) maximum duration of video clamping pulse referenced to end of horizontal sync −− 1.0 µs td(HSYNCl-CLBL) delay between leading edge of horizontal sync and start of video clamping pulse clamping pulse triggered on leading edge of horizontal sync; control bit CLAMP = 1; measured at VCLBL =3V − 300 − ns tclamp2(max) maximum duration of video clamping pulse referenced to end of horizontal sync −− 0.15 µs Vblank(CLBL) top voltage level of vertical blanking pulse notes 1 and 2 1.7 1.9 2.1 V tblank(CLBL) width of vertical blanking pulse at pins CLBL and HUNLOCK control bit VBLK = 0 220 260 300 µs control bit VBLK = 1 305 350 395 µs TCblank temperature coefficient of Vblank(CLBL) − 2 − mV/K Vscan(CLBL) output voltage during vertical scan ICLBL = 0 0.59 0.63 0.67 V TCscan temperature coefficient of Vscan(CLBL) −−2 − mV/K Isink(CLBL) internal sink current 2.4 −− mA IL(CLBL) external load current −−−3.0 mA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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