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TDA4853 Datasheet(PDF) 43 Page - NXP Semiconductors |
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TDA4853 Datasheet(HTML) 43 Page - NXP Semiconductors |
43 / 60 page 1999 Jul 13 43 Philips Semiconductors Product specification I2C-bus autosync deflection controllers for PC/TV monitors TDA4853; TDA4854 PLL2 soft start sequence and PLL2 soft-down sequence Fig.26 PLL2 soft start sequence and PLL2 soft-down sequence via the I2C-bus. a. PLL2 soft start sequence, via the I2C-bus, if VCC > 8.6 V. b. PLL2 soft-down sequence, via the I2C-bus, if VCC > 8.6 V. (1) HDRV, BDRV, VOUT2 and VOUT1 are floating for VCC < 8.6 V. handbook, full pagewidth VHPLL2 continuous blanking off PLL2 enabled frequency detector enabled HDRV/HFLB protection enabled 4.7 V 3.4 V 1.7 V time HDRV duty cycle begins to increase 1 V VOUT1 and VOUT2 enabled BDRV duty cycle begins to increase HDRV duty cycle has reached nominal value 2.8 V BDRV duty cycle has reached nominal value MGM084 handbook, full pagewidth VHPLL2 continuous blanking (pin 16 and 17) activated PLL2 disabled frequency detector disabled HDRV/HFLB protection disabled 4.7 V 3.4 V 1.7 V time HDRV floating 1 V VOUT1 and VOUT2 floating BDRV duty cycle begins to decrease(1) 2.8 V BDRV floating HDRV duty cycle begins to decrease(1) MGM085 |
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