January 1994

8

Philips Semiconductors

Preliminary specification

Synchronization circuit with synchronized

vertical divider system for 60 Hz

TDA2579C

NOISE LEVEL DETECTOR

The IC also embodies a built-in sync pulse noise level

detection circuit. This circuit is directly connected to pin 5

and measures the noise level at the middle of the

horizontal sync pulse. When a signal-to-noise level (S/N)

of

≤19 dB is detected a counter circuit is activated.

S/N

A video input signal is processed as "acceptable noise

free" when 12 out of 15 sync pulses have a noise level

below 19 dB for successive field periods. The sync pulses

are processed during a 15 line width gating period

generated by the divider system. The measuring circuit

has a built-in noise level hysteresis of approximately 3 dB.

The use of a filter of 1 k

Ω and 150 pF in front of pin 5

reduces the noise content of the CVBS signal by

approximately 6 dB.

When the "acceptable noise free" condition is found the

phase detector of pin 8 is switched to not gated and normal

time constant. When a higher sync pulse noise level is

found the phase detector is switched over to slow time

constant and gated sync pulse detection. At the same time

the integration time of the vertical sync pulse separator is

PHASE DETECTOR

The phase detector circuit is connected to pin 8. This

circuit consists of 3 separate phase detectors which are

activated depending on the voltage of pin 18 and the state

of the sync pulse noise detection circuit. For normal and

fast time constants all three phase detectors are activated

during the vertical blanking period, this with the exception

of the anti-top-flutter pulse period, and the separated

vertical sync pulse time. As a result, phase jumps in the

video signal related to the video head, take over of video

recorders are quickly restored within the vertical blanking

period. At the end of the blanking period the phase

detector time constant is increased by a factor of 1.4.

In this way there is no requirement for external VTR time

constant switching, and thus all station numbers are

suitable for signals from VTR, video games or home

computers.

= 20 log

Video voltage (black-to-white signal)

Noise (RMS)

------------------------------------------------------------------------------------------------

For quick locking of a new TV station starting from a noise

only signal condition (normal time constant) a special

circuit is incorporated. A new TV station which is not

locked to the horizontal oscillator will result in a voltage

decrease below 0.1 V at pin 18. This will activate a field

period counter which switches the phase detector to fast

for 3 field periods during the vertical scan period.

The horizontal oscillator will now lock to the new TV station

and as a result, the voltage on pin 18 will increase to

approximately 6.5 V. When pin 18 reaches a level of 1.8 V

the mute output transistor of pin 13 is switched off and the

divider is set to the large window. In general the mute

reception of a new TV signal. When the voltage on pin 18

reaches a level of 5 V, usually within 15 ms, the field

counter is switched off and the time constant is switched

from fast to normal during the vertical scan period.

If the new TV station is weak, the sync noise detector is

activated. This will result in a change over of pin 18 voltage

from 6.5 V to approximately 10 V. When pin 18 exceeds

the level of 7.8 V the phase detector is switched to slow

time constant and gated sync pulse condition.

The phase detector output current during the blanking

period is now reduced from 2 mA to 1.35 mA.

When desired, most conditions of the phase detector can

also be set by external means in the following way:

• fast time constant, TV transmitter identification circuit

not active, connect pin 18 to ground (pin 9)

• fast time constant, TV transmitter identification circuit

active, connect a 220 k

Ω resistor between pin 18 and

ground; this condition can also be set by using a 3.6 V

stabistor diode instead of a resistor

• slow time constant (with the exception of the vertical

blanking period), connect pin 18 via a 10 k

Ω resistor to

+12 V (pin 10); in this condition the transmitter

identification circuit is not active

• no switching to slow time constant required (transmitter

identification circuit active), connect a 6.8 V Zener diode

between pin 18 and ground.