FS7140-01 datasheet(12/15 Pages) AMI

Part #	FS7140-01

Description	Programmable Phase-Locked Loop Clock Generator

PDF	15 Pages

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Manufacturer	AMI [AMI SEMICONDUCTOR]

Direct Link	http://www.amis.com

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12 / 15 page

12

AMI Semiconductor - Rev. 3.0

www.amis.com

FS7140-01 / FS7140-01g / FS7145 Programmable Phase-Locked Loop Clock Generator Data Sheet

Table 12: DC Electrical Specifications

Parameter

Symbol Conditions/Description

Min.

Typ.

Max.

Units

Overall

Supply Current, Dynamic

IDD

CMOS mode; FXTAL = 15MHz; FVCO = 400MHz;

FCLK = 200MHx; does not include load current

35

mA

Supply Current, Static

IDDL

SHUT1, SHUT2 bit both “1”

400

700

mA

Serial Communication I/O (SDA, SCL)

High-Level Input Voltage

VIH

0.8*VDD

V

Low-Level Input Voltage

VIL

0.2*VDD V

Hysteresis Voltage

Vhys

0.33*VDD

V

Input Leakage Current

II

SDA, SCL in read condition

-10

+10

mA

Low-Level Output Sink Current (SDA)

IOL

SDA in acknowledge condition; VSDA = 0.4V

5

14

mA

Address Select Input (ADDR0, ADDR1)

High-Level Input Voltage

VIH

VVDD-1.0

V

Low-Level Input Voltage

VIL

0.8

V

High-Level Input Current (pull-down)

IIH

VADDRx = VDD

30

mA

Low-Level Input Current

IIL

VADDRx = 0V

-1

1

mA

Reference Frequency Input (REF)

High-Level Input Voltage

VIH

VVDD-1.0

V

Low-Level Input Voltage

VIL

0.8

V

High-Level Input Current

IIH

VREF = VDD

-1

1

mA

Low-Level Input Current (pull-down)

IIL

VREF = 0V

-30

mA

Sync Control Input (SYNC)

High-Level Input Voltage

VIH

VVDD-1.0

V

Low-Level Input Voltage

VIL

0.8

V

High-Level Input Current

IIH

VREF = VDD

-1

1

mA

Low-Level Input Current (pull-down)

IIL

VREF = 0V

-30

mA

Crystal Oscillator Input (XIN)

Threshold Bias Voltage

VTH

VDD/2

V

High-Level Input Current

IIH

VXIN = VDD

40

mA

Low-Level input Current

IIL

VXIN = GND

-40

mA

Crystal Frequency

FX

Fundamental mode

35

MHz

Recommended Crystal Load Capacitance* CL(XTAL)

For best matching with internal crystal oscillator load

16-18

pF

Crystal Oscillator Output (XOUT)

High-Level Output Source Current

IOH

VXOUT = 0

-8.5

mA

Low-Level Output Sink Current

IOL

VXOUT = VDD

11

mA

PECL Current Program I/O (IPRG)

Low-Level Input Current

IIL

VIPRG = 0V; PECL Mode

-10

10

mA

Clock Outputs, CMOS Mode (CLKN, CLKP)

High-Level Output Source Current

IOH

VO = 2.0V

19

mA

Low-Level Output Sink Current

IOL

VO = 0.4V

-35

mA

Clock Outputs, PECL Mode (CLKN, CLKP)

IPRG Bias Voltage

VIPRG

VIPRG will be clamped to this level when a resistor is

connected from VDD to IPRG

VDD/3

V

IPRG Bias Current

IIPRG

IIPRG - (VVDD - VIPRG) / RSET

3.5

mA

Sink Current to IPRG Current Ratio

13

Tristate Output Current

IZ

-10

10

mA

Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization data

and are not production tested to any specific limits. MIN and MAX characterization data are ± 3

s from typical. Negative currents indicate current flows out of the device.

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