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LTC2207-14 Datasheet(PDF) 24 Page - Linear Technology |
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LTC2207-14 Datasheet(HTML) 24 Page - Linear Technology |
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24 / 32 page  LTC2207-14/LTC2206-14 24 220714614fa APPLICATIONS INFORMATION Output Driver Power Separate output power and ground pins allow the output drivers to be isolated from the analog circuitry. The power supply for the digital output buffers, OVDD, should be tied to the same power supply as for the logic being driven. For example, if the converter is driving a DSP powered by a 1.8V supply, then OVDD should be tied to that same 1.8V supply. In CMOS mode OVDD can be powered with any logic voltage up to the VDD of the ADC. OGND can be powered with any voltage from ground up to 1V and must be less than OVDD. The logic outputs will swing between OGND and OVDD. Internal Dither The LTC2207-14/LTC2206-14 are 14-bit ADCs with a very linear transfer function; however, at low input levels even slight imperfections in the transfer function will result in unwanted tones. Small errors in the transfer function are usually a result of ADC element mismatches. An optional internal dither mode can be enabled to randomize the input location on the ADC transfer curve, resulting in improved SFDR for low signal levels. As shown in Figure 14, the output of the sample-and-hold amplifier is summed with the output of a dither DAC. The dither DAC is driven by a long sequence pseudo-random Figure 13. Descrambling a Scrambled Digital Output • • • D1 D0 D2 D12 D13 LTC2207-14/ LTC2206-14 PC BOARD FPGA CLKOUT OF D13/D0 D12/D0 D2/D0 D1/D0 D0 |
Similar Part No. - LTC2207-14 |
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Similar Description - LTC2207-14 |
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