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LTC2207-14 Datasheet(PDF) 23 Page - Linear Technology |
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LTC2207-14 Datasheet(HTML) 23 Page - Linear Technology |
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23 / 32 page  LTC2207-14/LTC2206-14 23 220714614fa The output should be buffered with a device such as a ALVCH16373 CMOS latch. For full speed operation the capacitive load should be kept under 10pF. A resistor in series with the output may be used but is not required since the output buffer has a series resistor of 33 Ω on chip. Lower OVDD voltages will also help reduce interference from the digital outputs. Data Format The LTC2207-14/LTC2206-14 parallel digital output can be selected for offset binary or 2’s complement format. The format is selected with the MODE pin. This pin has a four level logic input, centered at 0, 1/3VDD, 2/3VDD and VDD. An external resistor divider can be used to set the 1/3VDD and 2/3VDD logic levels. Table 1 shows the logic states for the MODE pin. Table 1. MODE Pin Function MODE Output Format Clock Duty Cycle Stabilizer 0(GND) Offset Binary Off 1/3VDD Offset Binary On 2/3VDD 2’s Complement On VDD 2’s Complement Off Overflow Bit An overflow output bit (OF) indicates when the converter is over-ranged or under-ranged. A logic high on the OF pin indicates an overflow or underflow. Output Clock The ADC has a delayed version of the encode input available as a digital output. Both a noninverted version, CLKOUT+ and an inverted version CLKOUT– are provided. The CLKOUT+/CLKOUT– can be used to synchronize the con- verter data to the digital system. This is necessary when using a sinusoidal encode. Data can be latched on the rising edge of CLKOUT+ or the falling edge of CLKOUT–. CLKOUT+ falls and CLKOUT– rises as the data outputs are updated. Digital Output Randomizer Interference from the ADC digital outputs is sometimes unavoidable. Interference from the digital outputs may be from capacitive or inductive coupling or coupling through the ground plane. Even a tiny coupling factor can result in discernible unwanted tones in the ADC output spectrum. By randomizing the digital output before it is transmitted off chip, these unwanted tones can be randomized, trading a slight increase in the noise floor for a large reduction in unwanted tone amplitude. The digital output is “Randomized” by applying an exclu- sive-OR logic operation between the LSB and all other data output bits. To decode, the reverse operation is applied; that is, an exclusive-OR operation is applied between the LSB and all other bits. The LSB, OF and CLKOUT outputs are not affected. The output Randomizer function is active when the RAND pin is high. Figure 12. Functional Equivalent of Digital Output Randomizer • • • CLKOUT+ OF D13/D0 D12/D0 D2/D0 D1/D0 D0 D0 D1 RAND = HIGH, SCRAMBLE ENABLED D2 D12 D13 OF LTC2207-14/LTC2206-14 CLKOUT RAND 22076 F12 APPLICATIONS INFORMATION |
Similar Part No. - LTC2207-14 |
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