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MH32S72BBFA-6 Datasheet(PDF) 16 Page - Mitsubishi Electric Semiconductor

Part # MH32S72BBFA-6
Description  2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

MH32S72BBFA-6 Datasheet(HTML) 16 Page - Mitsubishi Electric Semiconductor

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MITSUBISHI
ELECTRIC
2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH32S72BBFA -6
MITSUBISHI LSIs
16/Jun. /1999
MIT-DS-333-0.1
AC TIM ING REQUIREMENTS
(Ta=0 ~ 70°C, Vdd = 3.3 +/- 0.3V, Vss = 0V, unless otherwise noted)
Input Pulse Levels:
0.8V to 2.0V
Input Tim ing Measurement Level:
1.4V
CK
Signal
1.4V
1.4V
Any AC tim ing is
referenced to the input
signal crossing
through 1.4V.
LATCH MODE
16
Limits
Symbol Parameter
Unit
tCLK
CK cycle time
ns
tCH
CK High pulse width
ns
tCL
CK Low pilse width
ns
tT
Transition time of CK
ns
tIS
Input Setup time(all inputs)
ns
tIH
Input Hold time(all inputs)
ns
tRC
Row cycle time
ns
tRCD
Row to Column Delay
ns
tRAS
Row Active time
ns
tRP
Row Precharge time
ns
tWR
Write Recovery time
ns
tRRD
Act to Act Deley time
ns
tPDE
Power Down Exit time
ns
tRSC
Mode Register Set Cycle time
ns
tREF
Refresh Interval time
ms
CL=3
tSRX
Self Refresh Exit time
ns
-6
Min.
Max.
2.5
7.5
2.5
1
10
1.5
0.8
67.5
22.5
45
100000
22.5
15
15
7.5
15
64
7.5
CL=4
10
ns
Note:1 The timing requirements are assumed tT=1ns. If tT is longer than 1ns, (tT-1)ns
should be added to the parameter.


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