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MH32D72AKLA-10 Datasheet(PDF) 37 Page - Mitsubishi Electric Semiconductor |
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MH32D72AKLA-10 Datasheet(HTML) 37 Page - Mitsubishi Electric Semiconductor |
37 / 38 page MITSUBISHI LSIs MITSUBISHI ELECTRIC MH32D72AKLA-10,-75 2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module MIT-DS-0398-1.1 24.Nov.2000 Preliminary Spec. Some contents are subject to change without notice. 37 Serial Presence Detect Table II 31 Density of each bank on module 256MByte 40 36-61 Superset Information (may be used in future) option 00 62 SPD Revision 63 Checksum for bytes 0-62 Check sum for -10 64-71 Manufactures Jedec ID code per JEP-108E MITSUBISHI 1CFFFFFFFFFFFFFF 72 Manufacturing location XX 73-90 Manufactures Part Number 91-92 Revision Code PCB revision rrrr 93-94 Manufacturing date year/week code yyww 95-98 Assembly Serial Number serial number ssssssss 99-127 Reserved Undefined 00 128-255 32 Command and Address signal input setup time 33 Command and Address signal input hold time 34 Data signal input setup time 35 Data signal input hold time 0 00 Check sum for -75 MH32D72AKLA-75 MH32D72AKLA-10 4D483332443732414B4C412D373520202020 4D483332443732414B4C412D313020202020 -75 -10 -75 -10 -75 -10 -75 -10 0.9nS 1.2nS 0.9nS 1.2nS 0.5nS 0.6nS 0.5nS 0.6nS Open for Customer Use Undefined 00 90 C0 90 C0 50 60 50 60 CD 73 Manufacturing Location |
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