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MB84VD22184FM-70 Datasheet(PDF) 42 Page - SPANSION |
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MB84VD22184FM-70 Datasheet(HTML) 42 Page - SPANSION |
42 / 46 page ![]() MB84VD22184FM/VD22194FM-70 42 2. Data Retention Characteristics (SRAM) Note : tRC: Read cycle time •CE1s Controlled Data Retention Mode *1 *1 : In CE1s controlled data retention mode, input level of CE2s should be fixed Vccs to Vccs–0.2 V or Vss to 0.2 V during data retention mode. Other input and input/output pins can be used between –0.3 V to Vccs+0.3 V. *2 : When CE1s is operating at the VIH Min level, the standby current is given by ISB1s during the transition of VCCs from VCCs Max to VIH Min level. • CE2s Controlled Data Retention Mode * * : In CE2s controlled data retention mode, input and input/output pins can be used between –0.3 V to Vccs+0.3V. Parameter Symbol Value Unit Min Typ Max Data Retention Supply Voltage VDH 1.5 — 3.1 V Standby Current VDH = 3.0 V IDDS2 —— 10 µA Chip Deselect to Data Retention Mode Time tCDR 0— — ns Recovery Time tR tRC —— ns VCCs 2.7 V VIH GND Data Retention Mode *2 tCDR CE1s VCCs – 0.2 V *2 tR VDH VCCs 2.7 V GND Data Retention Mode VIH VIL CE2s tCDR tR 0.2 V VDH |
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