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ABSOLUTE MAXIMUM RATINGS

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RECOMMENDED OPERATING CONDITIONS

CDCL1810

SLLS781A – FEBRUARY 2007 – REVISED MARCH 2007

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be

more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

PACKAGED DEVICES

FEATURES

–40

°C to +85°C

CDCL1810RGZT

48-pin QFN (RGZ) Package, small tape and reel

–40

°C to +85°C

CDCL1810RGZR

48-pin QFN (RGZ) Package, tape and reel

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For the most current specifications and package information, see the Package Option Addendum located at the end of this data sheet or

refer to our web site at www.ti.com.

Over operating free-air temperature range (unless otherwise noted).

VALUE

UNIT

–0.3 to 2.5

V

–0.3 to 4.0

V

–0.3 to 3.0

V

ESD

Electrostatic discharge (HBM)

2

kV

Junction temperature

+125

°C

Storage temperature range

–65 to +150

°C

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Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

condition is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

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All voltage values are with respect to network ground terminal.

Over operating free-air temperature range (unless otherwise noted).

MIN

NOM

MAX

UNIT

Digital supply voltage

1.7

1.8

1.9

V

Analog supply voltage

1.7

1.8

1.9

V

Ambient temperature (no airflow, no heatsink)

–40

+85

°C

Junction temperature

+105

°C

θ

JA

airflow = 0 lfm

28.3

°C/W

airflow = 50 lfm

22.4

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No heatsink; power uniformly distributed; 36 ground vias (6 x 6 array) tied to the thermal exposed pad; 4-layer high-K board.

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