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P87C552 Datasheet(PDF) 52 Page - NXP Semiconductors |
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P87C552 Datasheet(HTML) 52 Page - NXP Semiconductors |
52 / 74 page Philips Semiconductors Preliminary specification P87C552 80C51 8-bit microcontroller 8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, low voltage (2.7V–5.5V), low power 1999 Mar 30 52 !******************************************************************************************************** ! SI01 EQUATE LIST !******************************************************************************************************** !******************************************************************************************************** ! LOCATIONS OF THE SI01 SPECIAL FUNCTION REGISTERS !******************************************************************************************************** 00D8 S1CON –0xd8 00D9 S1STA –0xd9 00DA S1DAT –0xda 00DB S1ADR –0xdb 00A8 IEN0 –0xa8 00B8 IP0 –02b8 !******************************************************************************************************** ! BIT LOCATIONS !******************************************************************************************************** 00DD STA –0xdd ! STA bit in S1CON 00BD SI01HP –0xbd ! IP0, SI01 Priority bit !******************************************************************************************************** ! IMMEDIATE DATA TO WRITE INTO REGISTER S1CON !******************************************************************************************************** 00D5 ENS1_NOTSTA_STO_NOTSI_AA_CR0 –0xd5 ! Generates STOP ! (CR0 = 100kHz) 00C5 ENS1_NOTSTA_NOTSTO_NOTSI_AA_CR0 –0xc5 ! Releases BUS and ! ACK 00C1 ENS1_NOTSTA_NOTSTO_NOTSI_NOTAA_CR0 –0xc1 ! Releases BUS and ! NOT ACK 00E5 ENS1_STA_NOTSTO_NOTSI_AA_CR0 –0xe5 ! Releases BUS and ! set STA !******************************************************************************************************** ! GENERAL IMMEDIATE DATA !******************************************************************************************************** 0031 OWNSLA –0x31 ! Own SLA+General Call ! must be written into S1ADR 00A0 ENSI01 –0xa0 ! EA+ES1, enable SIO1 interrupt ! must be written into IEN0 0001 PAG1 –0x01 ! select PAG1 as HADD 00C0 SLAW –0xc0 ! SLA+W to be transmitted 00C1 SLAR –0xc1 ! SLA+R to be transmitted 0018 SELRB3 –0x18 ! Select Register Bank 3 !******************************************************************************************************** ! LOCATIONS IN DATA RAM !******************************************************************************************************** 0030 MTD –0x30 ! MST/TRX/DATA base address 0038 MRD –0x38 ! MST/REC/DATA base address 0040 SRD –0x40 ! SLV/REC/DATA base address 0048 STD –0x48 ! SLV/TRX/DATA base address 0053 BACKUP –0x53 ! Backup from NUMBYTMST ! To restore NUMBYTMST in case ! of an Arbitration Loss. 0052 NUMBYTMST –0x52 ! Number of bytes to transmit ! or receive as MST. 0051 SLA –0x51 ! Contains SLA+R/W to be ! transmitted. 0050 HADD –0x50 ! High Address byte for STATE 0 ! till STATE 25. |
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