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P87C552 Datasheet(PDF) 46 Page - NXP Semiconductors |
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P87C552 Datasheet(HTML) 46 Page - NXP Semiconductors |
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46 / 74 page  Philips Semiconductors Preliminary specification P87C552 80C51 8-bit microcontroller 8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, low voltage (2.7V–5.5V), low power 1999 Mar 30 46 Table 8. Slave Receiver Mode (Continued) STATUS STATUS OF THE APPLICATION SOFTWARE RESPONSE STATUS CODE (S1STA) STATUS OF THE I2C BUS AND SIO1 HARDWARE TO/FROM S1DAT TO S1CON NEXT ACTION TAKEN BY SIO1 HARDWARE (S1STA) SIO1 HARDWARE TO/FROM S1DAT STA STO SI AA A0H A STOP condition or repeated START di i h b No STDAT action or 0 0 0 0 Switched to not addressed SLV mode; no recognition of own SLA or General call address condition has been received while still addressed as SLV/REC or SLV/TRX No STDAT action or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will be recognized; General call address will be recognized if S1ADR.0 = logic 1 SLV/REC or SLV/TRX No STDAT action or 1 0 0 0 Switched to not addressed SLV mode; no recognition of own SLA or General call address. A START condition will be transmitted when the bus becomes free No STDAT action 1 0 0 1 Switched to not addressed SLV mode; Own SLA will be recognized; General call address will be recognized if S1ADR.0 = logic 1. A START condition will be transmitted when the bus becomes free. Table 9. Slave Transmitter Mode STATUS STATUS OF THE APPLICATION SOFTWARE RESPONSE STATUS CODE (S1STA) STATUS OF THE I2C BUS AND SIO1 HARDWARE TO/FROM S1DAT TO S1CON NEXT ACTION TAKEN BY SIO1 HARDWARE (S1STA) SIO1 HARDWARE TO/FROM S1DAT STA STO SI AA A8H Own SLA+R has been received; ACK hb d Load data byte or X 0 0 0 Last data byte will be transmitted and ACK bit will be received has been returned load data byte X 0 0 1 Data byte will be transmitted; ACK will be received B0H Arbitration lost in SLA+R/W as master; Own SLA+R has Load data byte or X 0 0 0 Last data byte will be transmitted and ACK bit will be received been received, ACK has been returned load data byte X 0 0 1 Data byte will be transmitted; ACK bit will be received B8H Data byte in S1DAT has been transmitted; ACK has been Load data byte or X 0 0 0 Last data byte will be transmitted and ACK bit will be received ACK has been received load data byte X 0 0 1 Data byte will be transmitted; ACK bit will be received C0H Data byte in S1DAT has been transmitted; NOT ACK h b No S1DAT action or 0 0 0 01 Switched to not addressed SLV mode; no recognition of own SLA or General call address NOT ACK has been received no S1DAT action or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will be recognized; General call address will be recognized if S1ADR.0 = logic 1 no S1DAT action or 1 0 0 0 Switched to not addressed SLV mode; no recognition of own SLA or General call address. A START condition will be transmitted when the bus becomes free no S1DAT action 1 0 0 1 Switched to not addressed SLV mode; Own SLA will be recognized; General call address will be recognized if S1ADR.0 = logic 1. A START condition will be transmitted when the bus becomes free. C8H Last data byte in S1DAT has been i d (AA 0) No S1DAT action or 0 0 0 0 Switched to not addressed SLV mode; no recognition of own SLA or General call address transmitted (AA = 0); ACK has been received no S1DAT action or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will be recognized; General call address will be recognized if S1ADR.0 = logic 1 no S1DAT action or 1 0 0 0 Switched to not addressed SLV mode; no recognition of own SLA or General call address. A START condition will be transmitted when the bus becomes free no S1DAT action 1 0 0 1 Switched to not addressed SLV mode; Own SLA will be recognized; General call address will be recognized if S1ADR.0 = logic 1. A START condition will be transmitted when the bus becomes free. |
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