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NE83C92A Datasheet(PDF) 8 Page - NXP Semiconductors |
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NE83C92A Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 9 page Philips Semiconductors Product specification NE83C92 Low-power coaxial Ethernet transceiver 1995 May 1 8 SERIAL NETWORK INTERFACE NETWORK INTERFACE CONTROLLER I S O L A T I O N DTE COAX B U S NE83C92 COAX TRANSCEIVER INTERFACE MAU (OPTIONAL) (AUI CABLE) MAU = Medium Attachment Unit AUI Cable = Attachment Unit Interface Cable (not used in Thin Ethernet applications) SD00310 Figure 2. Interface Diagram for Ethernet/Thin Ethernet Local Area Network 10% tRD tRR 90% tRON+2 tRON PHASE VIOLATION ALLOWED VALID TIMING RXI RX + 1 2 3 4 5 6 7 8 9 10 11 5 6 7 8 9 10 11 tTR tRF tTF SD00306 Figure 3. Receiver Timing tOS RXI RX + tRHI SD00279 Figure 4. Receiver End-of-Packet Timing 10% 90% tTD tTON tTST+2 tTST tTOFF TX + TXO 100ns 1 2 3 4 5 6 7 8 9 10 11 1 2 3 4 5 6 7 8 9 10 11 tRR tTR tRF tTF SD00305 Figure 5. Transmitter Timing |
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