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NE5560N Datasheet(PDF) 12 Page - NXP Semiconductors |
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NE5560N Datasheet(HTML) 12 Page - NXP Semiconductors |
12 / 16 page Philips Semiconductors Product specification NE/SE5560 Switched-mode power supply control circuit 1994 Aug 31 12 V11 (CURRENT LIMITING) NORMAL OPERATING POINT LEVEL 1 LEVEL 2 .48 .60 (V) OC1 OC2 SL00374 Figure 15. Output Characteristics Dynamic Current Limit and Current Protection (Pin 11) In many applications, it is not necessary to have a real constant-current output of the SMPS. Protection of the power transistor will be the prime goal. This can be realized with the NE5560 in an economical way. A resistor (or a current transformer) in the emitter of the power transistor gives a replica of the collector current. This signal must be connected to Pin 11. As can be seen in Figure 14, this input has two comparators with different reference levels. The output of the comparator with the lower 0.48V reference is connected to the same gate as the output of the PWM. When activated, it will immediately reset the output flip-flop, so reducing the duty cycle. The effectiveness of this cycle-by-cycle current limit diminishes at low duty cycle values. When δ becomes very small, the storage time of the power transistor becomes dominant. The current will now increase again, until it surpasses the reference of the second comparator. The output of this comparator activates the start-stop circuit and causes an immediate inhibit of the output pulses. After a certain deadtime, the circuit starts again with very narrow output pulses. The effect of this two-level current protection circuit is visualized in Figure 15. The Start-Stop Circuit The function of this protection circuit is to stop the output pulses as soon as a fault occurs and to keep the output stopped for several periods. After this dead-time, the output starts with a very small, gradually increasing duty cycle. When the fault is persistent, this will cause a cyclic switch-off/switch-on condition. This “hiccup” mode effectively limits the energy during fault conditions. The realization and the working of the circuit are indicated in Figures 12 and 13. The dead time and the soft-start are determined by an external capacitor that is connected to Pin 6 ( δMAX setting). An RS flip-flop can be set by three different functions: 1. Remote on/off on Pin 10. 2. Overcurrent protection on Pin 11. 3. Low supply voltage protection (internal). As soon as one of these functions cause a setting of the flip-flop, the output pulses are blocked via the output gate. In the same time transistor Q1 is forward-biased, resulting in a discharge of the capacitor on Pin 6. The discharging current is limited by an internal 150 Ω resistor in the emitter of Q1. The voltage at Pin 6 decreases to below the lower level of the sawtooth. When V6 has dropped to 0.6V, this will activate a comparator and the flip-flop is reset. The output stage is no longer blocked and Q1 is cut off. Now VZ will charge the capacitor via R1 to the normal δMAX voltage. The output starts delivering very narrow pulses as soon as V6 exceeds the lower sawtooth level. The duty cycle of the output pulse now gradually increases to a value determined by the feedback on Pin 3, or by the static δMAX setting on Pin 6. 15 14 2 6 12 11 10 LATCH START/ STOP SET RESET 0.6V 0.48V 0.6V LOW SUPPLY VOLTAGE PROTECTION 100 Ω R1 R2 CSS Q1 Q2 PWM VZ SL00375 Figure 16. Start-Stop Circuit |
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