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QT240-ISSG Datasheet(PDF) 4 Page - Quantum Research Group |
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QT240-ISSG Datasheet(HTML) 4 Page - Quantum Research Group |
4 / 12 page Multiple touch electrodes connected to any SNSnK can be used, for example, to create control surfaces on both sides of an object. It is important to limit the amount of stray capacitance on the SNS terminals, for example by minimizing trace lengths and widths to allow for higher gain without requiring higher values of Cs. Under heavy delta-Cx loading of one key, cross coupling to another key’s trace can cause the other key to trigger. Therefore, electrode traces from adjacent keys should not be run close to each other over long runs in order to minimize cross-coupling if large values of delta-Cx are expected, for example when an electrode is directly touched. This is not a problem when the electrodes are working through a plastic panel with normal touch sensitivity. 1.4 Sensitivity 1.4.1 Introduction Sensitivity can be altered to suit various applications and situations on a channel-by-channel basis. The easiest and most direct way to impact sensitivity is to alter the value of each Cs; more Cs yields higher sensitivity. Each channel has its own Cs value and can therefore be independently adjusted. 1.4.2 Alternative Ways to Increase Sensitivity Sensitivity can also be increased by using bigger electrode areas, reducing panel thickness, or using a panel material with a higher dielectric constant . 1.4.3 Decreasing Sensitivity In some cases the circuit may be too sensitive. Gain can be lowered further by a number of strategies: a) making the electrode smaller, b) making the electrode into a sparse mesh using a high space-to-conductor ratio, or c) by decreasing the Cs capacitors. 1.4.4 Key Balance A number of factors can cause sensitivity imbalances. Notably, SNS wiring to electrodes can have differing stray amounts of capacitance to ground. Increasing load capacitance will cause a decrease in gain. Key size differences, and proximity to other metal surfaces can also impact gain. The four keys may thus require ‘balancing’ to achieve similar sensitivity levels. This can be best accomplished by trimming the values of the four Cs capacitors to achieve equilibrium. The four Rs resistors have no effect on sensitivity and should not be altered. Load capacitances can also be added to overly sensitive channels to ground, to reduce their gains. These should be in the order of a few picofarads. 2 QT240 Specifics 2.1 Signal Processing 2.1.1 Introduction These devices process all signals using 16 bit math , using a number of algorithms pioneered by Quantum. These algorithms are specifically designed to provide for high survivability in the face of adverse environmental changes. 2.1.2 Drift Compensation Signal drift can occur because of changes in Cx , Cs, and Vdd over time. If a low grade Cs capacitor is chosen, the signal can drift greatly with temperature. If keys are subject to extremes of temperature or humidity, the signal can also drift. It is crucial that drift be compensated, else false detections, nondetections, and sensitivity shifts will follow. Drift compensation (Figure 2.1) is a method that makes the reference level track the raw signal at a slow rate, only while no detection is in effect. The rate of reference adjustment must be performed slowly else legitimate detections can also be ignored. The IC drift compensates each channel independently using a slew-rate limited change to the reference level; the threshold and hysteresis values are slaved to this reference. Once an object is sensed, the drift compensation mechanism ceases since the signal is legitimately high, and therefore should not cause the reference level to change. lQ 4 QT240R R1.11/1006 Figure 1.2 Fast, Spread-spectrum Circuit S1 S3 S2 VDD OUT4 OUT1 OUT2 OUT3 10nF CS1 RS1 2.2K C1 22nF 10nF CS3 10nF CS4 RS3 2.2K VDD 1M R2 22K RSNS1 360K R5 22K RSNS4 RS4 2.2K OPT1 10nF CS2 RS2 2.2K 1M R1 R6 180K VDD 62K R4 1M R3 10 second timeout shown 22K RSNS2 SPEED OPT OPT2 22K RSNS3 QT240_ISS Figure 2.1 Drift Compensation Threshold Signal Hysteresis Reference Output |
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