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AM29LV800BB-120DGC2 Datasheet(PDF) 3 Page - Advanced Micro Devices |
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AM29LV800BB-120DGC2 Datasheet(HTML) 3 Page - Advanced Micro Devices |
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3 / 12 page  2 Am29LV800B Known Good Die SU P P L E MEN T GENERAL DESCRIPTION The Am29LV800B in Known Good Die (KGD) form is an 8 Mbit, 3.0 volt-only Flash memory. AMD defines KGD as standard product in die form, tested for function- ality and speed. AMD KGD products have the same reli- ability and quality as AMD products in packaged form. Am29LV800B Features The Am29LV800B is an 8 Mbit, 3.0 volt-only Flash memory organized as 1,048,576 bytes or 524,288 words. The word-wide data (x16) appears on DQ15– DQ0; the byte-wide (x8) data appears on DQ7–DQ0. To eliminate bus contention the device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. No VPP is required for program or erase operations. The device can also be programmed in standard EPROM programmers. The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Com- mands are written to the command register using stan- dard microprocessor write timings. Register contents serve as input to an internal state-machine that con- trols the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices. Device programming occurs by executing the program command sequence. This initiates the Embedded Program algorithm—an internal algorithm that auto- matically times the program pulse widths and verifies proper cell margin. The Unlock Bypass mode facili- tates faster programming times by requiring only two write cycles to program data instead of four. Device erasure occurs by executing t he erase command sequence. This initiates the Embedded Erase algorithm—an internal algorithm that automati- cally preprograms the array (if it is not already pro- grammed) before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin. The host system can detect whether a program or erase operation is complete by observing the RY/BY# pin, or by reading the DQ7 (Data# Polling) and DQ6 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. Hardware data protection measures include a low VCC detector that automatically inhibits write opera- tions during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of the sectors of memory. This can be achieved in-system or via pro- gramming equipment. The Erase Suspend feature enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system microprocessor to read the boot-up firmware from the Flash memory. The device offers two power-saving features. When addresses have been stable for a specified amount of time, the device enters the automatic sleep mode. The system can also place the device into the standby mode. Power consumption is greatly reduced in both these modes. AMD’s Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effective- ness. The device electrically erases all bits within a se ct or simultaneously via Fowler-Nordheim tun- neling. The data is programmed using hot electron injec- tion. Electrical Specifications Refer to the Am29LV800B data sheet, publication number 21490, for full electrical specifications on the Am29LV800B in KGD form. |
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