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USB97CFDC2-01 Datasheet(PDF) 23 Page - SMSC Corporation |
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USB97CFDC2-01 Datasheet(HTML) 23 Page - SMSC Corporation |
23 / 24 page ![]() SMSC DS – USB97CFDC2-01 Page 23 Rev. 02-27-07 DATASHEET PARAMETER SYM CONDITIONS (NOTE 1, 2, 3) MIN TYP MAX UNIT Cable Impedance and Timing Cable Impedance (Full Speed) ZO (45 Ω +/- 15%) 38.75 51.75 Ω Cable Delay (One Way) TCBL 30 ns Note 1: All voltages are measured from the local ground potential, unless otherwise specified. Note 2: All timing use a capacitive load (CL) to ground of 50pF, unless otherwise specified. Note 3: Full speed timings have a 1.5K Ω pull-up to 2.8 V on the D+ data line. Note 4: Measured from 10% to 90% of the data signals. Note 5: The rising and falling edges should be smoothly transiting (monotonic). Note 6: Timing differences between the differential data signals. Note 7: Measured at crossover point of differential data signals. Note 8: These are relative to the 14.318 MHz crystal. |
Similar Part No. - USB97CFDC2-01 |
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Similar Description - USB97CFDC2-01 |
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