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CDP1855 Datasheet(PDF) 13 Page - Intersil Corporation |
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CDP1855 Datasheet(HTML) 13 Page - Intersil Corporation |
13 / 16 page 13 Dynamic Electrical Specifications At TA = -40 to +85oC, VDD ±5%, tR, tF = 20ns, VIH = 0.7VDD, VIL = 0.3VDD, CL = 100pF (See Figure 7) (NOTE 1) PARAMETER VDD (V) LIMITS UNITS CDP1855 CDP1855C MIN (NOTE 2) TYP MAX MIN (NOTE 2) TYP MAX OPERATION TIMING Maximum Clock Frequency (Note 3) 53.2 4 - 3.2 4 - MHz 10 6.4 8 - - - - MHz Maximum Shift Frequency (1 Device) (Note 4) 51.6 2 - 1.6 2 - MHz 10 3.2 4 - - - - MHz Minimum Clock Width tCLK0 tCLK1 5 - 100 150 - 100 150 ns 10 - 50 75 - - - ns Minimum Clock Period tCLK 5 - 250 312 - 250 312 ns 10 - 125 156 - - - ns Clock to Shift Propagation Delay tCSH 5 - 200 300 - 200 300 ns 10 - 100 150 - - - ns Minimum C.I. to Shift Setup tSU 5 - 50 67 - 50 67 ns 10 - 25 33 - - - ns C.O. from Shift Propagation Delay tPLH tPHL 5 - 450 600 - 450 600 ns 10 - 225 300 - - - ns Minimum C.I. from Shift Hold tH 5 - 50 75 - 50 75 ns 10 - 25 40 - - - ns Minimum Register Input Setup tSU 5 - -20 10 - -20 10 ns 10 - -10 10 - - - ns Register after Shift Delay tPLH tPHL 5 - 400 600 - 400 600 ns 10 - 200 300 - - - ns Minimum Register after Shift Hold tH 5 - 50 100 - 50 100 ns 10 - 25 50 - - - ns C.O. from C.I. Propagation Delay tPLH tPHL 5 - 100 150 - 100 150 ns 10 - 50 75 - - - ns Register from C.I. Propagation Delay tPLH tPHL 5 - 80 120 - 80 120 ns 10 - 40 60 - - - ns NOTES: 1. Maximum limits of minimum characteristics are the values above which all devices function. 2. Typical values are for TA = 25 oC and nominal voltages. 3. Clock frequency and pulse width are given for systems using the internal clock option of the CDP1855. Clock frequency equals shift frequency for systems not using the internal clock option. 4. Shift period for cascading of devices is increased by an amount equal to the C.I. to C.O. Propagation Delay for each device added. CDP1855, CDP1855C |
Similar Part No. - CDP1855_1 |
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Similar Description - CDP1855_1 |
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