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HEF4017BP Datasheet(PDF) 6 Page - NXP Semiconductors |
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HEF4017BP Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 8 page January 1995 6 Philips Semiconductors Product specification 5-stage Johnson counter HEF4017B MSI Fig.4 Waveforms showing hold times for CP0 to CP1 and CP1 to CP0. Hold times are shown as positive values, but may be specified as negative values. Fig.5 Waveforms showing recovery time for MR; minimum CP0 and MR pulse widths. Conditions: CP1 = LOW while CP0 is triggered on a LOW to HIGH transition. tWCP and tRMR also apply when CP0 = HIGH and CP1 is triggered on a HIGH to LOW transition. |
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