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LD7531 Datasheet(PDF) 9 Page - Leadtrend Technology |
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LD7531 Datasheet(HTML) 9 Page - Leadtrend Technology |
9 / 18 page LD7531 9 Leadtrend Technology Corporation www.leadtrend.com.tw LD7531-DS-00 June 2008 S ) MAX ( PEAK R V 85 . 0 I = R1 OUT CS VCC GND LD7531 C1 Cbulk D1 Rs Comp Vin Fig. 15 A 190nS leading-edge blanking (LEB) time is included in the input of CS pin to prevent the false-trigger from the current spike. In the low power application, if the total pulse width of the turn-on spikes is less than 190nS and the negative spike on the CS pin doesn’t exceed -0.3V, it could eliminated the R-C filter (as shown in the figure16). However, the total pulse width of the turn-on spike is decided by the output power, circuit design and PCB layout. It is strongly recommended to adopt a smaller R-C filter (as shown in figure 17) for higher power application to avoid the CS pin being damaged by the negative turn-on spike. Output Stage and Maximum Duty-Cycle An output stage of a CMOS buffer, with typical 500mA driving capability, is incorporated to drive a power MOSFET directly. And the maximum duty-cycle of LD7531 is limited to 75% to avoid the transformer saturation. Voltage Feedback Loop The voltage feedback signal is provided from the TL431 at the secondary side through the photo-coupler to the COMP pin of the LD7531. Similar to UC3842, the LD7531 would carry 2 diodes voltage offset at the stage to feed the voltage divider at the ratio of 1/3, that is, ) V 2 V ( 3 1 V F COMP ) PWM ( COMPARATOR − × = − A pull-high resistor is embedded internally and can be eliminated externally. Fig. 16 Fig. 17 |
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