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AT45DB321D Datasheet(PDF) 9 Page - ATMEL Corporation

Part # AT45DB321D
Description  32-megabit 2.7-volt DataFlash
Download  55 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT45DB321D Datasheet(HTML) 9 Page - ATMEL Corporation

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3597H–DFLASH–02/07
AT45DB321D [Preliminary]
7.4
Page Erase
The Page Erase command can be used to individually erase any page in the main memory array
allowing the Buffer to Main Memory Page Program to be utilized at a later time. To perform a
page erase in the DataFlash standard page size (528 bytes), an opcode of 81H must be loaded
into the device, followed by three address bytes comprised of 1 don’t care bit, 13 page address
bits (PA12 - PA0) that specify the page in the main memory to be erased and 10 don’t care bits.
To perform a page erase in the binary page size (512 bytes), the opcode 81H must be loaded
into the device, followed by three address bytes consist of 2 don’t care bits, 13 page address bits
(A21 - A9) that specify the page in the main memory to be erased and 9 don’t care bits. When a
low-to-high transition occurs on the CS pin, the part will erase the selected page (the erased
state is a logical 1). The erase operation is internally self-timed and should take place in a maxi-
mum time of t
PE. During this time, the status register and the RDY/BUSY pin will indicate that the
part is busy.
7.5
Block Erase
A block of eight pages can be erased at one time. This command is useful when large amounts
of data has to be written into the device. This will avoid using multiple Page Erase Commands.
To perform a block erase for the DataFlash standard page size (528 bytes), an opcode of 50H
must be loaded into the device, followed by three address bytes comprised of 1 don’t care bit,
10 page address bits (PA12 -PA3) and 13 don’t care bits. The 10 page address bits are used to
specify which block of eight pages is to be erased. To perform a block erase for the binary page
size (512 bytes), the opcode 50H must be loaded into the device, followed by three address
bytes consisting of 2 don’t care bits, 10 page address bits (A21 - A12) and 12 don’t care bits.
The 10 page address bits are used to specify which block of eight pages is to be erased. When
a low-to-high transition occurs on the CS pin, the part will erase the selected block of eight
pages. The erase operation is internally self-timed and should take place in a maximum time of
t
BE. During this time, the status register and the RDY/BUSY pin will indicate that the part is busy.
Table 7-1.
Block Erase Addressing
PA12/
A21
PA11/
A20
PA10/
A19
PA9/
A18
PA8/
A17
PA7/
A16
PA6/
A15
PA5/
A14
PA4/
A13
PA3/
A12
PA2/
A11
PA1/
A10
PA0/
A9
Block
0
0
0
0000
000
X
X
X
0
0
0
0
0000
001
X
X
X
1
0
0
0
0000
010
X
X
X
2
0
0
0
0000
011
X
X
X
3
1
1
1
1111
100
X
X
X
1020
1
1
1
1111
101
X
X
X
1021
1
1
1
1111
110
X
X
X
1022
1
1
1
1111
111
X
X
X
1023


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