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NCP1450ASN27T1 Datasheet(PDF) 21 Page - ON Semiconductor

Part # NCP1450ASN27T1
Description  PWM Step?뭫p DC?묭C Controller
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCP1450ASN27T1 Datasheet(HTML) 21 Page - ON Semiconductor

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NCP1450A
http://onsemi.com
21
1
3
GND
CE
2
OUT
NC
4
EXT
5
TP1
VIN
TP4
GND
TP3
VOUT
TP2
GND
C1
220
mF
L1
10
mH
JP1
C2
10
mF
NTGS3446T1
ON
OFF
CE
D1
MBRM110L
Q1
IC1
1
3
GND
CE
2
OUT
NC
4
EXT
5
TP5
VIN
TP6
GND
TP7
VOUT
TP8
GND
C4
220
mF
L2
10
mH
JP2
C5
10
mF
ON
OFF
CE
D2
MBRM110L
IC2
Q2
MMJT9410
Cb
3000 pF
Rb
560
Figure 73. NCP1450A Evaluation Board Schematic Diagram 1 (Step−up
DC−DC Converter Using External MOSFET Switch)
Figure 74. NCP1450A Evaluation Board Schematic Diagram 2 (Step−up
DC−DC Converter Using External Bipolar Transistor Switch)
C3
0.1
mF
C6
0.1
mF
PCB Layout Hints
Grounding
One point grounding should be used for the output power
return ground, the input power return ground, and the device
switch ground to reduce noise. In Figure 73, e.g.: C2 GND,
C1 GND, and IC1 GND are connected at one point in the
evaluation board. The input ground and output ground traces
must be thick enough for current to flow through and for
reducing ground bounce.
Power Signal Traces
Low resistance conducting paths should be used for the
power carrying traces to reduce power loss so as to improve
efficiency (short and thick traces for connecting the inductor
L can also reduce stray inductance), e.g.: short and thick
traces listed below are used in the evaluation board:
1. Trace from TP1 to L1
2. Trace from L1 to anode pin of D1
3. Trace from cathode pin of D1 to TP3
Output Capacitor
The output capacitor should be placed close to the output
terminals to obtain better smoothing effect on the output
ripple.
Switching Noise Decoupling Capacitor
A 0.1
mF ceramic capacitor should be placed close to the
OUT pin and GND pin of the NCP1450A to filter the
switching spikes in the output voltage monitored by the
OUT pin.


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