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5CEFA5F23A6ES Datasheet(PDF) 9 Page - Intel Corporation |
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5CEFA5F23A6ES Datasheet(HTML) 9 Page - Intel Corporation |
9 / 37 page ![]() Resource Member Code C3 C4 C5 C7 C9 LVDS Transmitter 52 84 84 120 140 Receiver 52 84 84 120 140 PCIe Hard IP Block 1 2 2 2 2 Hard Memory Controller 1 2 2 2 2 Related Information True LVDS Buffers in Devices, I/O Features in Cyclone V Devices Provides the number of LVDS channels in each device package. Package Plan Table 7. Package Plan for Cyclone V GX Devices Member Code M301 (11 mm) M383 (13 mm) M484 (15 mm) U324 (15 mm) U484 (19 mm) GPIO XCVR GPIO XCVR GPIO XCVR GPIO XCVR GPIO XCVR C3 — — — — — — 144 3 208 3 C4 129 4 175 6 — — — — 224 6 C5 129 4 175 6 — — — — 224 6 C7 — — — — 240 3 — — 240 6 C9 — — — — — — — — 240 5 Member Code F484 (23 mm) F672 (27 mm) F896 (31 mm) F1152 (35 mm) GPIO XCVR GPIO XCVR GPIO XCVR GPIO XCVR C3 208 3 — — — — — — C4 240 6 336 6 — — — — C5 240 6 336 6 — — — — C7 240 6 336 9 480 9 — — C9 224 6 336 9 480 12 560 12 Cyclone V GT This section provides the available options, maximum resource counts, and package plan for the Cyclone V GT devices. The information in this section is correct at the time of publication. For the latest information and to get more details, refer to the Product Selector Guide. Related Information Product Selector Guide Provides the latest information about Intel products. Cyclone V Device Overview 683694 | 2018.05.07 Send Feedback Cyclone V Device Overview 9 |
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