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74LCX00 Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74LCX00 Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 11 page © 2005 Fairchild Semiconductor Corporation DS012408 www.fairchildsemi.com March 1995 Revised January 2005 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs General Description The LCX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys- tems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technol- ogy to achieve high speed operation while maintaining CMOS low power dissipation. Features s 5V tolerant inputs s 2.3V–3.6V VCC specifications provided s 5.2 ns tPD max (VCC = 3.3V), 10 µA ICC max s Power down high impedance inputs and outputs s ±24 mA output drive (V CC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds JEDEC 78 conditions s ESD performance: Human body model > 2000V Machine model > 200V s Leadless Pb-Free DQFN package Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: DQFN package available in Tape and Reel only. Note 2: “_NL” package available in Tape and Reel only. Order Number Package Package Description Number 74LCX00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX00MX_NL (Note 2) M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX00SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX00BQX (Note 1) MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm 74LCX00MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LCX00MTCX_NL (Note 2) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
Similar Part No. - 74LCX00_05 |
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Similar Description - 74LCX00_05 |
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