CDCL6010 datasheet(18/24 Pages) TI

Part #	CDCL6010

Description	1.8V, 11 Output Clock Multiplier, Distributor, Jitter Cleaner, and Buffer

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CDCL6010

SLLS780 – FEBRUARY 2007

Table 5. Phase Settings for Divide Ratio = 1, 2, 4, 8, 16, 32 (continued)

With PH0[4:0] = 00000

PH1

Divide

Phase Lead

Ratio

[4]

[3]

[2]

[1]

[0]

(radian)

Notes

32

0

1

(2

π/32)

0

1

0

2(2

π/32)

0

1

3(2

π/32)

0

1

0

4(2

π/32)

0

1

0

1

5(2

π/32)

0

1

0

6(2

π/32)

0

1

7(2

π/32)

0

1

0

8(2

π/32)

0

1

0

1

9(2

π/32)

0

1

0

1

0

10(2

π/32)

0

1

0

1

11(2

π/32)

0

1

0

12(2

π/32)

0

1

0

1

13(2

π/32)

0

1

0

14(2

π/32)

0

1

15(2

π/32)

1

0

16(2

π/32)

1

0

1

17(2

π/32)

1

0

1

0

18(2

π/32)

1

0

1

19(2

π/32)

1

0

1

0

20(2

π/32)

1

0

1

0

1

21(2

π/32)

1

0

1

0

22(2

π/32)

1

0

1

23(2

π/32)

1

0

24(2

π/32)

1

0

1

25(2

π/32)

1

0

1

0

26(2

π/32)

1

0

1

27(2

π/32)

1

0

28(2

π/32)

1

0

1

29(2

π/32)

1

0

30(2

π/32)

1

31(2

π/32)

18

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