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EP1C12F100I8ES Datasheet(PDF) 58 Page - Altera Corporation |
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EP1C12F100I8ES Datasheet(HTML) 58 Page - Altera Corporation |
58 / 104 page 2–52 Altera Corporation Preliminary January 2007 Cyclone Device Handbook, Volume 1 Advanced I/O Standard Support Cyclone device IOEs support the following I/O standards: ■ 3.3-V LVTTL/LVCMOS ■ 2.5-V LVTTL/LVCMOS ■ 1.8-V LVTTL/LVCMOS ■ 1.5-V LVCMOS ■ 3.3-V PCI ■ LVDS ■ RSDS ■ SSTL-2 class I and II ■ SSTL-3 class I and II ■ Differential SSTL-2 class II (on output clocks only) Table 2–12 describes the I/O standards supported by Cyclone devices. Cyclone devices contain four I/O banks, as shown in Figure 2–35. I/O banks 1 and 3 support all the I/O standards listed in Table 2–12. I/O banks 2 and 4 support all the I/O standards listed in Table 2–12 except the 3.3-V PCI standard. I/O banks 2 and 4 contain dual-purpose DQS, DQ, Table 2–12. Cyclone I/O Standards I/O Standard Type Input Reference Voltage (VREF) (V) Output Supply Voltage (VCCIO) (V) Board Termination Voltage (VTT) (V) 3.3-V LVTTL/LVCMOS Single-ended N/A 3.3 N/A 2.5-V LVTTL/LVCMOS Single-ended N/A 2.5 N/A 1.8-V LVTTL/LVCMOS Single-ended N/A 1.8 N/A 1.5-V LVCMOS Single-ended N/A 1.5 N/A 3.3-V PCI (1) Single-ended N/A 3.3 N/A LVDS (2) Differential N/A 2.5 N/A RSDS (2) Differential N/A 2.5 N/A SSTL-2 class I and II Voltage-referenced 1.25 2.5 1.25 SSTL-3 class I and II Voltage-referenced 1.5 3.3 1.5 Differential SSTL-2 (3) Differential 1.25 2.5 1.25 Notes to Table 2–12: (1) There is no megafunction support for EP1C3 devices for the PCI compiler. However, EP1C3 devices support PCI by using the LVTTL 16-mA I/O standard and drive strength assignments in the Quartus II software. The device requires an external diode for PCI compliance. (2) EP1C3 devices in the 100-pin TQFP package do not support the LVDS and RSDS I/O standards. (3) This I/O standard is only available on output clock pins ( PLL_OUT pins). EP1C3 devices in the 100-pin package do not support this I/O standard as it does not have PLL_OUT pins. |
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