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EP1C12F100C6ES Datasheet(PDF) 23 Page - Altera Corporation

Part # EP1C12F100C6ES
Description  Cyclone FPGA Family Data Sheet
Download  104 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP1C12F100C6ES Datasheet(HTML) 23 Page - Altera Corporation

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Altera Corporation
2–17
January 2007
Preliminary
MultiTrack Interconnect
All embedded blocks communicate with the logic array similar to LAB-
to-LAB interfaces. Each block (i.e., M4K memory or PLL) connects to row
and column interconnects and has local interconnect regions driven by
row and column interconnects. These blocks also have direct link
interconnects for fast connections to and from a neighboring LAB.
Table 2–2 shows the Cyclone device's routing scheme.
Table 2–2. Cyclone Device Routing Scheme
Source
Destination
LUT Chain
v
Register Chain
v
Local Interconnect
vvvvv
Direct Link
Interconnect
v
R4 Interconnect
vv
v
C4 Interconnect
vv
v
LE
vvvvvv
M4K RAM Block
vvvv
PLL
vvv
Column IOE
v
Row IOE
vvv


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