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PIC12F683 Datasheet(PDF) 15 Page - Microchip Technology

Part # PIC12F683
Description  8-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC12F683 Datasheet(HTML) 15 Page - Microchip Technology

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 2004 Microchip Technology Inc.
Preliminary
DS41211B-page 13
PIC12F683
2.2.2.3
INTCON Register
The INTCON register is a readable and writable
register, which contains the various enable and flag bits
for TMR0 register overflow, GPIO change and external
GP2/INT pin interrupts.
REGISTER 2-3:
INTCON – INTERRUPT CONTROL REGISTER (ADDRESS: 0Bh OR 8Bh)
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit,
GIE (INTCON<7>). User
software should ensure the appropriate
interrupt flag bits are clear prior to
enabling an interrupt.
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
GIE
PEIE
T0IE
INTE
GPIE
T0IF
INTF
GPIF
bit 7
bit 0
bit 7
GIE: Global Interrupt Enable bit
1
= Enables all unmasked interrupts
0
= Disables all interrupts
bit 6
PEIE: Peripheral Interrupt Enable bit
1
= Enables all unmasked peripheral interrupts
0
= Disables all peripheral interrupts
bit 5
T0IE: TMR0 Overflow Interrupt Enable bit
1
= Enables the TMR0 interrupt
0
= Disables the TMR0 interrupt
bit 4
INTE: GP2/INT External Interrupt Enable bit
1
= Enables the GP2/INT external interrupt
0
= Disables the GP2/INT external interrupt
bit 3
GPIE: GPIO Change Interrupt Enable bit(1)
1
= Enables the GPIO change interrupt
0
= Disables the GPIO change interrupt
bit 2
T0IF: TMR0 Overflow Interrupt Flag bit(2)
1
= TMR0 register has overflowed (must be cleared in software)
0
= TMR0 register did not overflow
bit 1
INTF: GP2/INT External Interrupt Flag bit
1
= The GP2/INT external interrupt occurred (must be cleared in software)
0
= The GP2/INT external interrupt did not occur
bit 0
GPIF: GPIO Change Interrupt Flag bit
1
= When at least one of the GPIO<5:0> pins changed state (must be cleared in software)
0
= None of the GPIO<5:0> pins have changed state
Note 1: IOC register must also be enabled.
2: T0IF bit is set when Timer0 rolls over. Timer0 is unchanged on Reset and should
be initialized before clearing T0IF bit.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown


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