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PIC12F683 Datasheet(PDF) 83 Page - Microchip Technology |
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PIC12F683 Datasheet(HTML) 83 Page - Microchip Technology |
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83 / 148 page  2004 Microchip Technology Inc. Preliminary DS41211B-page 81 PIC12F683 12.3.5 TIME-OUT SEQUENCE On power-up, the time-out sequence is as follows: first, PWRT time-out is invoked after POR has expired, then OST is activated after the PWRT time-out has expired. The total time-out will vary based on oscillator configu- ration and PWRTE bit status. For example, in EC mode with PWRTE bit erased (PWRT disabled), there will be no time-out at all. Figure 12-4, Figure 12-5 and Figure 12-6 depict time-out sequences. The device can execute code from the INTOSC while OST is active by enabling Two-Speed Start-up or Fail-Safe Monitor (see Section 3.6 “Two-Speed Clock Start-up Mode” and Section 3.7 “Fail-Safe Clock Monitor”). Since the time-outs occur from the POR pulse, if MCLR is kept low long enough, the time-outs will expire. Then, bringing MCLR high will begin execution immediately (see Figure 12-5). This is useful for testing purposes or to synchronize more than one PIC12F683 device operating in parallel. Table 12-5 shows the Reset conditions for some special registers, while Table 12-4 shows the Reset conditions for all the registers. 12.3.6 POWER CONTROL (PCON) REGISTER The Power Control register PCON (address 8Eh) has two status bits to indicate what type of Reset that last occurred. Bit 0 is BOD (Brown-out). BOD is unknown on Power- on Reset. It must then be set by the user and checked on subsequent Resets to see if BOD = 0, indicating that a Brown-out has occurred. The BOD status bit is a “don’t care” and is not necessarily predictable if the brown-out circuit is disabled (BODEN<1:0> = 00 in the Configuration Word register). Bit 1 is POR (Power-on Reset). It is a ‘0’ on Power-on Reset and unaffected otherwise. The user must write a ‘1’ to this bit following a Power-on Reset. On a subsequent Reset, if POR is ‘0’, it will indicate that a Power-on Reset has occurred (i.e., VDD may have gone too low). For more information, see Section 4.2.3 “Ultra Low- Power Wake-up” and Section 12.3.4 “Brown-out Detect (BOD)”. TABLE 12-1: TIME-OUT IN VARIOUS SITUATIONS TABLE 12-2: PCON BITS AND THEIR SIGNIFICANCE TABLE 12-3: SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT Oscillator Configuration Power-up Brown-out Detect Wake-up from Sleep PWRTE = 0 PWRTE = 1 PWRTE = 0 PWRTE = 1 XT, HS, LP TPWRT + 1024 • TOSC 1024 • TOSC TPWRT + 1024 • TOSC 1024 • TOSC 1024 • TOSC RC, EC, INTOSC TPWRT —TPWRT —— POR BOD TO PD Condition 0u11 Power-on Reset 1011 Brown-out Detect uu0u WDT Reset uu00 WDT Wake-up uuuu MCLR Reset during normal operation uu10 MCLR Reset during Sleep Legend: u = unchanged, x = unknown Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOD Value on all other Resets(1) 03h STATUS IRP RP1 RPO TO PD Z DC C 0001 1xxx 000q quuu 8Eh PCON — — ULPWUE SBODEN — —POR BOD --01 --qq --0u --uu Legend: u = unchanged, x = unknown, — = unimplemented bit, reads as ‘0’, q = value depends on condition. Shaded cells are not used by BOD. Note 1: Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation. |
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