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PIC12F683 Datasheet(PDF) 80 Page - Microchip Technology |
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PIC12F683 Datasheet(HTML) 80 Page - Microchip Technology |
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80 / 148 page  PIC12F683 DS41211B-page 78 Preliminary 2004 Microchip Technology Inc. 12.3 Reset The PIC12F683 differentiates between various kinds of Reset: a) Power-on Reset (POR) b) WDT Reset during normal operation c) WDT Reset during Sleep d) MCLR Reset during normal operation e) MCLR Reset during Sleep f) Brown-out Detect (BOD) Some registers are not affected in any Reset condition; their status is unknown on POR and unchanged in any other Reset. Most other registers are reset to a “Reset state” on: • Power-on Reset •MCLR Reset •MCLR Reset during Sleep •WDT Reset • Brown-out Detect (BOD) They are not affected by a WDT wake-up since this is viewed as the resumption of normal operation. TO and PD bits are set or cleared differently in different Reset situations, as indicated in Table 12-2. These bits are used in software to determine the nature of the Reset. See Table 12-4 for a full description of Reset states of all registers. A simplified block diagram of the On-Chip Reset Circuit is shown in Figure 12-1. The MCLR Reset path has a noise filter to detect and ignore small pulses. See Section 15.0 “Electrical Specifications” for pulse width specifications. FIGURE 12-1: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT S RQ External Reset MCLR/VPP pin VDD OSC1/ WDT Module VDD Rise Detect OST/PWRT LFINTOSC WDT Time-out Power-on Reset OST 10-bit Ripple Counter PWRT Chip_Reset 11-bit Ripple Counter Reset Enable OST Enable PWRT SLEEP Brown-out(1) Detect SBODEN BODEN CLKI pin Note 1: Refer to the Configuration Word register (Register 12-1). |
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