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PIC12F683 Datasheet(PDF) 75 Page - Microchip Technology |
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PIC12F683 Datasheet(HTML) 75 Page - Microchip Technology |
75 / 148 page 2004 Microchip Technology Inc. Preliminary DS41211B-page 73 PIC12F683 11.3.2 PWM DUTY CYCLE The PWM duty cycle is specified by writing to the CCPR1L register and to the CCP1CON<5:4> bits. Up to 10-bit resolution is available. The CCPR1L contains the eight MSbs and the CCP1CON<5:4> contains the two LSbs. This 10-bit value is represented by CCPR1L:CCP1CON<5:4>. The following equation is used to calculate the PWM duty cycle in time. EQUATION 11-2: CCPR1L and CCP1CON<5:4> can be written to at any time, but the duty cycle value is not latched into CCPR1H until after a match between PR2 and TMR2 occurs (i.e., the period is complete). In PWM mode, CCPR1H is a read-only register. The CCPR1H register and a 2-bit internal latch are used to double-buffer the PWM duty cycle. This double-buffering is essential for glitch-free PWM operation. When the CCPR1H and 2-bit latch match TMR2, concatenated with an internal 2-bit Q clock or 2 bits of the TMR2 prescaler, the CCP1 pin is cleared. The maximum PWM resolution (bits) for a given PWM frequency is given by the following formula. EQUATION 11-3: 11.3.3 SETUP FOR PWM OPERATION The following steps should be taken when configuring the CCP1 module for PWM operation: 1. Set the PWM period by writing to the PR2 register. 2. Set the PWM duty cycle by writing to the CCPR1L register and CCP1CON<5:4> bits. 3. Make the CCP1 pin an output by clearing the TRISIO<2> bit. 4. Set the TMR2 prescale value and enable Timer2 by writing to T2CON. 5. Configure the CCP1 module for PWM operation. TABLE 11-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz PWM Duty Cycle = (CCPR1L:CCP1CON<5:4> • TOSC • TMR2 Prescale Value Note: If the PWM duty cycle value is longer than the PWM period, the CCP1 pin will not be cleared. Note: The PWM module may generate a prema- ture pulse when changing the duty cycle. For sensitive applications, disable the PWM module prior to modifying the duty cycle. Resolution = FOSC FPWM • TMR2 Prescale Value log(2) log bits PWM Frequency 1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz Timer Prescaler (1, 4, 16) 16 4 1 1 1 1 PR2 Value 0xFFh 0xFFh 0xFFh 0x3Fh 0x1Fh 0x17h Maximum Resolution (bits) 10 10 10 8 7 6.6 |
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