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PIC12F683 Datasheet(PDF) 52 Page - Microchip Technology |
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PIC12F683 Datasheet(HTML) 52 Page - Microchip Technology |
52 / 148 page ![]() PIC12F683 DS41211B-page 50 Preliminary 2004 Microchip Technology Inc. FIGURE 8-4: COMPARATOR OUTPUT BLOCK DIAGRAM REGISTER 8-2: CMCON1 – COMPARATOR CONTROL REGISTER 1 (ADDRESS: 1Ah) CMSYNC D Q EN To COUT pin RD CMCON Set CMIF bit D Q EN CL RD CMCON Reset To Data Bus CINV D Q EN TMR1 Clock Source(1) 0 1 To TMR1 Note 1: Comparator output is latched on falling edge of T1 clock source. Q3 U-0 U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 — — — — — — T1GSS CMSYNC bit 7 bit 0 bit 7-2: Unimplemented: Read as ‘0’ bit 1 T1GSS: Timer1 Gate Source Select bit 1 = Timer1 gate source is T1G pin (GP4 must be configured as digital input) 0 = Timer1 gate source is comparator output bit 0 CMSYNC: Comparator Synchronize bit 1 = COUT output synchronized with falling edge of Timer1 clock 0 = COUT output not synchronized with Timer1 clock Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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