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M41T81 Datasheet(PDF) 17 Page - STMicroelectronics |
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M41T81 Datasheet(HTML) 17 Page - STMicroelectronics |
17 / 30 page M41T81 Clock operation 17/30 3.4 Setting alarm clock registers Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go off at a prescribed time on a specific month, date, hour, minute, or second or repeat every year, month, day, hour, minute, or second. It can also be programmed to go off while the M41T81 is in the battery back-up mode to serve as a system wake-up call. Bits RPT5-RPT1 put the alarm in the repeat mode of operation. Table 3 on page 18 shows the possible configurations. Codes not listed in the table default to the once per second mode to quickly alert the user of an incorrect alarm setting. When the clock information matches the alarm clock settings based on the match criteria defined by RPT5-RPT1, the AF (Alarm Flag) is set. If AFE (Alarm Flag Enable) is also set (and SQWE is '0.'), the alarm condition activates the IRQ/FT/OUT/SQW pin. Note: If the address pointer is allowed to increment to the Flag Register address, an alarm condition will not cause the Interrupt/Flag to occur until the address pointer is moved to a different address. It should also be noted that if the last address written is the “Alarm Seconds,” the address pointer will increment to the Flag address, causing this situation to occur. The IRQ/FT/OUT/SQW output is cleared by a READ to the Flags Register as shown in Figure 12. A subsequent READ of the Flags Register is necessary to see that the value of the Alarm Flag has been reset to '0.' The IRQ/FT/OUT/SQW pin can also be activated in the battery back-up mode. The IRQ/FT/OUT/SQW will go low if an alarm occurs and both ABE (Alarm in Battery Back-up Mode Enable) and AFE are set. Figure 13 illustrates the back-up mode alarm timing. Figure 12. Alarm interrupt reset waveform IRQ/FT/OUT/SQW ACTIVE FLAG 0Fh 0Eh 10h HIGH-Z AI04617 |
Similar Part No. - M41T81_06 |
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Similar Description - M41T81_06 |
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