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CS5535-UDC Datasheet(PDF) 87 Page - National Semiconductor (TI) |
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CS5535-UDC Datasheet(HTML) 87 Page - National Semiconductor (TI) |
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87 / 555 page  ACC Functional Description (Continued) www.national.com 87 Revision 0.8 transferred for a given PRD is 65534 bytes for mono streams and 65532 bytes for stereo streams. For stereo streams (bus masters 0, 1, and 6): Memory Region Base Address and Size should be a multiple of four (DWORD aligned). This ensures an equal number of left and right samples. For mono streams (bus masters 2, 3, 4, 5, and 7): Memory Region Base Address and Size should be a multiple of two (WORD aligned). Descriptions of the control flags are: • End of Transfer (EOT) - If set in a PRD, this bit indi- cates the last entry in the PRD table. The last entry in a PRD table must have either the EOT bit or the JMP bit set. A PRD can not have both the JMP and EOT bits set. When the bus master reaches an EOT, it stops and clears its Bus Master Enable bit. If software desires an IRQ to be generated with the EOT, it must set the EOP bit and the EOT bit on the last PRD entry. •End of Page (EOP) - If set in a PRD and the bus master has completed the PRD’s transfer, the End of Page bit is set (in the IRQ status register) and an IRQ is generated. If a second EOP is reached due to the completion of another PRD before the End of Page bit is cleared, the Bus Master Error bit is set (in the IRQ status register) and the bus master pauses. In this paused condition, reading the IRQ status register clears both the Bus Master Error and the End of Page bits, and the bus master continues. •Jump (JMP) - This PRD is special. If set, the Memory Region Base Address is now the target address of the JMP. The target address of the JMP must point to another PRD. There is no audio data transfer with this PRD. This PRD allows the creation of a looping mecha- nism. If a PRD table is created with the JMP bit set in the last PRD, the PRD table does not need a PRD with the EOT bit set. A PRD can not have both the JMP and EOT bits set. 4.3.7.3 PCM Data Format and Byte Order Table 4-7 shows an example of the how PCM audio data is stored in memory (byte order and channel order). Each row represents a byte in memory, with increasing addresses as you go down. The byte order can be configured via the Bus Master Command Register for Intel (little endian) or Motor- ola (big endian) byte ordering. Changing the byte order ONLY affects how PCM data is interpreted. PRD entries and register contents are always little endian. The two channel format applies to the 32-bit bus masters handling left and right input and output. The single channel format applies to the 16-bit bus masters. The 32-bit bus masters always operate on stereo data, and the 16-bit bus masters always operate on mono data. Since there is no special mode for playing monaural sound through the main chan- nels (left and right), it is the responsibility of the software to create stereo PCM data with identical samples for the left and right channels to effectively output monaural sound. Table 4-6. Physical Region Descriptor (PRD) Format DWORD Byte 3 Byte 2 Byte 1 Byte 0 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 Memory Region Base Address [31:0] (Address of Audio Data Buffer) 1E O T E O P J M P Reserved Size [15:0] Table 4-7. PCM Data format (Byte and Channel Ordering) 2 Channel, Little Endian 1 Channel, Little Endian 2 Channel, Big Endian 1 Channel, Big Endian Sample Channel Byte Sample Byte Sample Channel Byte Sample Byte 0 Left Low 0 Low 0 Left High 0 High 0 Left High 0 High 0 Left Low 0 Low 0 Right Low 1 Low 0 Right High 1 High 0 Right High 1 High 0 Right Low 1 Low 1 Left Low 2 Low 1 Left High 2 High 1 Left High 2 High 1 Left Low 2 Low 1 Right Low 3 Low 1 Right High 3 High 1 Right High 3 High 1 Right Low 3 Low |
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Similar Description - CS5535-UDC |
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