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CS5535-UDC Datasheet(PDF) 81 Page - National Semiconductor (TI) |
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CS5535-UDC Datasheet(HTML) 81 Page - National Semiconductor (TI) |
81 / 555 page www.national.com 81 Revision 0.8 4.3 AC97 AUDIO CODEC CONTROLLER The primary purpose of the AC97 Audio Codec Controller (ACC) is to stream data between system memory and an AC97 codec (or codecs) using direct memory access (DMA). The AC97 codec supports several channels of digi- tal audio input and output. Hence, the ACC contains sev- eral bus mastering DMA engines to support these channels. This method off-loads the CPU, improving sys- tem performance. The ACC is connected to the system through the GLIU and all accesses to and from system memory go through the GLIU. The AC97 codec is con- nected with a serial interface, and all communication with the codec occurs via that interface (see Figure 4-3). Features include: • AC97 version 2.1 compliant interface to codecs: serial in (x2), serial out, sync out, and bit clock in. • Eight-channel buffered GLIU mastering interface. • Support for industry standard 16-bit pulse code modu- lated (PCM) audio format. • Support for any AC97 codec with Sample Rate Conver- sion (SRC). • Transport for audio data to and from the system memory and AC97 codec. • Capable of outputting multi-channel 5.1 surround sound (Left, Center, Right, Left Rear, Right Rear, and Low Frequency Effects). Hardware Includes: • GeodeLink Adapter. • Three 32-bit stereo-buffered bus masters (two for output, one for input). • Five 16-bit mono-buffered bus masters (three for output, two for input). • AC Link Control block for interfacing with external AC97 codec(s). The ACC logic controls the traffic to and from the AC97 codec. For input channels, serial data from the codec is buffered and written to system memory using DMA. For output channels, software-processed data is read from sys- tem memory and streamed out serially to the codec. Figure 4-3. ACC Block Diagram GLIU Data In GLIU Data Out GeodeLink Adaptor (GLA) Output Data Mux Registers / Control To/From Codec Control Signals to Bus Masters GLCP I/F Bus Master 0 Bus Master 1 Bus Master 2 Bus Master 3 Bus Master 4 Bus Master 5 Bus Master 6 Bus Master 7 CCU GL Clock CCU LBus Clock CCU AC Link Bit Clock AC Link |
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