 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
CS5535-UDC Datasheet(PDF) 75 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
CS5535-UDC Datasheet(HTML) 75 Page - National Semiconductor (TI) |
|
|
75 / 555 page  Revision 0.8 75 www.national.com 4.1 GEODELINK INTERFACE UNIT Many traditional architectures use buses to connect mod- ules together, usually requiring unique addressing for each register in every module. This requires that some kind of house-keeping be done as new modules are designed and new devices are created from the module set. Module select signals can be used to create the unique addresses, but that can get cumbersome and it requires that the mod- ule selects be sourced from some centralized location. To alleviate this issue, National developed an internal bus architecture called GeodeLink. The GeodeLink architecture connects the internal modules of a device using the data channels provided by GeodeLink Interface Units (GLIUs). Using GLIUs, all internal module port addresses are derived from the distinct port that the module is connected to. In this way, a module’s Model Specific Registers (MSRs) do not have unique addresses until a device is defined. Also, as defined by the GeodeLink architecture, a module’s port address depends on the location of the module sourc- ing the cycle, or source module. The CS5535 incorporates one GLIU into its device archi- tecture. Except for the configuration registers that are required for x86 compatibility, all internal registers are accessed through a Model Specific Register (MSR) set. MSRs have a 32-bit address space and a 64-bit data space. The full 64-bit data space is always read or written when accessed. 4.1.1 GLIU Port Connections Table 4-1 shows the GeodeLink Devices connected to each of the seven GLIU ports on CS5535. 4.1.2 Descriptor Summary Table 4-2 shows the descriptors reserved for each GeodeLink Device. Table 4-1. GLIU Port Connections Port Number Device 1 GeodeLink PCI South Bridge (GLPCI_SB) 2 USB Controller #2 (USBC2) 3 ATA-5 Controller (ATAC) 4 Diverse Device (DD) 5 AC97 Audio Controller (ACC) 6 USB Controller #1 (USBC1) 7 GeodeLink Control Processor (GLCP) Table 4-2. GLIU Descriptors Reserved for GeodeLink Devices Device Descriptor Type # of Descriptors Usage USBC1 P2D_BMK 1 Do not hit on keyboard emulation registers. USBC2 P2D_BMK 1 Do not hit on keyboard emulation registers. ATAC IOD_BM 1 For IDE master registers. IOD_BM 1 Defaults to 1Fxh. IOD_SC 1 Defaults to 3F6h. DD IOD_BM 3 COM ports legacy power management. IOD_BM 1 For secondary IDE trapping to 17xh. IOD_SC 1 For secondary IDE trapping to 376h. IOD_SC 1 Keyboard legacy power management. IOD_SC 3 LPC ports legacy power management. IOD_SC 1 Floppy legacy power management. ACC P2D_BM 1 For memory space registers. IOD_BM 1 For I/O space registers. GLPCI_SB P2D_BM 1 For master requests to GX2 GLPCI. Spares IOD_BM 2 Provides the possibility to virtualize NAND Flash accesses when the IDE/Flash shared pins are in the ‘IDE Position’. For the ‘Flash Position’, already dedicated IDE descriptors can be used to virtualize. IOD_BM 1 IOD_SC 1 P2D_BM 1 |
Similar Part No. - CS5535-UDC |
|
Similar Description - CS5535-UDC |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
