 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
CS5535-UDC Datasheet(PDF) 72 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
CS5535-UDC Datasheet(HTML) 72 Page - National Semiconductor (TI) |
|
|
72 / 555 page  www.national.com 72 Revision 0.8 Global Concepts and Features (Continued) 3.9 POWER MANAGEMENT Typically the three greatest power consumers in a comput- ing device are the display, the hard drive (if it has one) and the system electronics. The CPU usually consumes the most power of all the system electronic components. Man- aging power for the first two is relatively straightforward in the sense that they are simply turned on or off. Managing CPU power is more difficult since effective use clock con- trol technology requires effective detection of inactivity, both at a system level and at a code processing level. Power consumption in a GX2 or other Geode processor based system is managed with the use of both hardware and software. The complete hardware solution is provided for only when the GX2 processor is combined with the CS5535 Geode I/O companion. The processor power consumption is managed primarily through a sophisticated clock stop management technol- ogy. The processor also provides the hardware enablers from which the complete power management solution depends on. Basically two methods are supported to manage power during periods of inactivity. The first method, called activity based power management allows the hardware in the Geode I/O companion to monitor activity to certain devices in the system and if a period of inactivity occurs take some form of power conservation action. This method does not require OS support because this support is handled by SMM software. Simple monitoring of external activity is imperfect as well as inefficient. The second method, called passive power management, requires the OS to take an active role in managing power. National supports two appli- cation programming interfaces (APIs) to enable power management by the OS: Advanced Power Management (APM) and Advanced Configuration and Power Interface (ACPI). These two methods can be used independent of one another or they can be used together. The extent to which these resources are employed depends on the appli- cation and the discretion of the system designer. The GX2 processor and Geode CS5535 I/O companion devices contain advanced power management features for reducing the power consumption of the processor, I/O com- panion and other devices in the system. 3.9.1 Power Domains In order to support power management in periods of inac- tivity as well as “off” conditions, the CS5535 is divided into three power domains: • Working Domain - Consists of VCORE and VIO • Standby Domain - Consists of VCORE_VSB and VIO_VSB • RTC Domain - Consists of VBAT When the system is in an operational mode all three of the domains are on. In general the power management tech- niques used while operating produce power savings with- out user awareness. The performance and usability of the system is unaffected. When the system is “off” only the standby domain is pow- ered. If desired, the operational design can allow returning the system to the operational point when the system was last “on”. This “instant on” feature is a requirement for many battery powered systems. If the system has been removed from all power sources the Real Time Clock (RTC) can be kept operating with a small button battery. All sections of CS5535 use the Working domain except: Standby Domain • GPIO[31:24] and associated registers. • GPIO Input Conditioning Functions 6 and 7. • GPIO Power Management Events (PMEs) 6 and 7. • MFGPT[7:6]. AD[31:0] U1, T3, U3, R4, T4, R5, T5, U5, T6, U6, R7, T7, U7, R8, T8, U8, R12, T12, U12, R13, T13, U13, R14, T14, P15, R15, T15, P16, T16, R16, T17, R17 Pad driven to 0. Table 3-12. Sleep Driven IDE Signals Signal Ball No. Direction IDE_CS[1:0]# C10, B10 Pad driven to 0. IDE_IOR0# B13 Pad driven to 0. IDE_IOW0# C13 Pad driven to 0. IDE_AD[2:0] B11, A12, A11 Pad driven to 0. IDE_RESET# F15 Pad driven to 0. IDE_RDY0 A13 Pad TRI-STATE. Internal logic sees logic 0. IDE_DREQ0 A14 Pad TRI-STATE. Internal logic sees logic 0. IDE_DACK0# C12 Pad driven to 0. IDE_DATA[15:0] C14, B15, B16, A17, C17, D16, D17, E17, E16, E15, D15, B17, C16, C15, A15, B14 Pad driven to 0. Table 3-11. Sleep Driven PCI Signals Signal Ball No. Direction |
Similar Part No. - CS5535-UDC |
|
Similar Description - CS5535-UDC |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
