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CS5535-UDC Datasheet(PDF) 70 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5535-UDC
Description  Geode??CS5535 I/O Companion Multi-Function South Bridge
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5535-UDC Datasheet(HTML) 70 Page - National Semiconductor (TI)

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70
Revision 0.8
Global Concepts and Features (Continued)
SSMIs are primarily used for hardware emulation and
extension. From the perspective of the code on which the
trap occurred, everything is normal and done in hardware.
However, VSA code generally performs a number of opera-
tions to achieve the desired result. This can include return-
ing an appropriate read value to the trapped software. The
GLIU is often used to implement SSMI traps. Any I/O
descriptor can be used for this purpose by setting the Des-
tination ID to 0. On a descriptor hit, the GLIU traps the
access and sets the SSMI bit in the response packet.
3.8.3.3
ASMI/SSMI Summary
Table 3-9 provides a register summary for the Standard
GLD_SMI_MSRs.
Table 3-9. GLD_MSR_SMIs Summary
Port #, Device
FLAG Bit
EN Bit
SMI Type
Description
Port 0, GLIU (Note 1)
35
3
ASMI
Statistics Counter 2 Event
34
2
ASMI
Statistics Counter 1 Event
33
1
ASMI
Statistics Counter 0 Event
32
0
SSMI
Descriptor Trap and Illegal Accesses
Port 1, GLPCI_SB
22
6
ASMI
Target Abort Signaled
21
5
ASMI
Parity Error
20
4
ASMI
System Error
19
3
ASMI
EXECP Received
18
2
ASMI
SSMI Received
17
1
ASMI
Target Abort Received
16
0
ASMI
Master Abort Received
Port 2, USBC2
33
1
ASMI
INT by the USB (see PIC for actual source)
32
0
ASMI
ASMI for the USB (see USB for actual source)
Port 3, ATAC
33
1
ASMI
IRQ for IDE (see PIC for actual source)
1
0
SSMI
IDE PIO
Port 4, DD (DIVIL)
47
15
SSMI
PMC PM1_CNT
46
14
SSMI
PMC PM2_CNT
45
13
ASMI
KEL A20 Keyboard
44
12
SSMI
8237 DMA Controller access during legacy DMA
43
11
SSMI
LPC access during legacy DMA
41
9
SSMI
UART 2 access during legacy DMA
40
8
SSMI
UART 1 access during legacy DMA
39
7
ASMI
KEL INIT Port A
38
6
ASMI
KEL A20 Port A
37
5
ASMI
KEL INIT Keyboard
36
4
ASMI
PMC Event (see PMC for actual source)
35
3
ASMI
Extended PIC Mapper (see PIC for actual source)
34
2
ASMI
KEL Emulation Event
33
1
ASMI
Shutdown Special Cycle
32
0
ASMI
Halt Special Cycle
Port 5, ACC
32
0
SSMI
IRQ from ACC
Port 6, USBC1
33
1
ASMI
INT by the USB (see PIC for actual source)
32
0
ASMI
ASMI for the USB (see USB for actual source)
Port 7, GLCP
(Note 1)
17
1
ASMI
Debug event
16
0
ASMI
Convert CS5535 Global GLIU_Error to ASMI
Note 1.
For this device, the listed events are enabled when the EN bit is low. For all other devices, events are enabled when the associ-
ated EN bit is high.


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