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CS5535-UDC Datasheet(PDF) 61 Page - National Semiconductor (TI) |
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CS5535-UDC Datasheet(HTML) 61 Page - National Semiconductor (TI) |
61 / 555 page ![]() Revision 0.8 61 www.national.com Global Concepts and Features (Continued) affect packet routing from the listed masters. GLIU descrip- tors are only used to route requests from the GLPCI_SB and GLCP. 3.7.4 Legacy Keyboard Emulation In the CS5535, there are two USB Controllers and hence two copies of this hardware. The USB control registers are memory mapped. The memory region associated with these registers is relocatable via standard GLIU descriptor MSRs starting at an appropriate base address. The region size is 4 kB (1000h), that is, an offset range of 000h through FFFh. There are four registers called: HceControl, HceInput, HceOutput, and HceStatus. There are no USB control registers above this region. Special consideration is given to the legacy keyboard emu- lation control registers normally associated with the USB Controller. This “normal” association is due to the fact that “normally”, the keyboard emulation hardware is physically located with the USB hardware, even though there is no logical association between the two at the hardware level. This “normal” association is driven by industry standard device drivers that group the two register sets in the same region. The keyboard emulation registers are located at the USB base address plus 0100h. A single copy of the Keyboard Emulation Logic (KEL) hard- ware is located in the Diverse Device (DD) module, where it can be closely coordinated with a possible real keyboard controller in any of three locations: in either USB Controller (USBC1 or USBC2), or on the LPC bus. This leaves the problem of the control registers that are physically in the DD, but logically (from the software perspective) in the USB Controller. A descriptor type is incorporated into the CS5535 to deal with this keyboard issue. It is a variant of the standard “P2D Base Mask Descriptor” (P2D_BM) called P2D_BMK (key- board). A P2D_BMK descriptor does additional decoding based on Address bit 8. If this bit is low, the hit directs to the USB port. If this bit is high, the hit directs to the subtrac- tive port. There are two P2D_BMK descriptors in the CS5535 (see Section 5.1.2.2 "P2D Base Mask KEL Descriptors (GLIU_P2D_BMK[x])" on page 195). 3.7.5 GeodeLink Device Decoding Except Diverse Device Table 3-4 shows the register space map for all CS5535 devices except the Diverse Device. There are no fixed addresses associated with these devices other than the MSRs and the legacy IDE I/O addresses as detailed in Section 3.7.3 "GLIU Decoding". 3.7.6 Diverse Device Decoding Except Legacy I/O The Diverse Device “space” map except legacy I/O is shown in Table 3-5. Table 3-4. CS5535 Register Space Map Except Diverse Device Device MSR Space (Note 1) I/O Space Memory Space GLPCI_SB Standard GeodeLink Device MSRs plus GLPCI_SB setup. All MSRs also acces- sible from PCI Configuration space. None. None. GLCP Standard GeodeLink Device MSRs plus diagnostic and debug. None. None. GLIU Standard GeodeLink Device MSRs plus descriptor setup. Programmable SSMIs. Programmable SSMIs. ACC Standard GeodeLink Device MSRs. 16-byte codec I/F plus 48- byte master interface. All trap registers removed. Generates no SSMIs. The register space can be here also. ATAC Standard GeodeLink Device MSRs plus timing parameters. Bus Master LBAR. Legacy primary addresses. 16-byte master interface. None. USBC1 Standard GeodeLink Device MSRs plus PCI configuration emulation. Must set PCI BAR in USB Controller. None. 4 kB, but less than 256 bytes used. Keyboard emulation registers to Diverse Device. USBC2 Standard GeodeLink Device MSRs plus PCI configuration emulation. Must set PCI BAR in USB Controller. None. 4 kB, but less than 256 bytes used. Keyboard emulation registers to Diverse Device. Note 1. See Section 3.8 "Standard GeodeLink Device MSRs" on page 67 for register descriptions. |
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