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CS5535-UDC Datasheet(PDF) 55 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5535-UDC
Description  Geode??CS5535 I/O Companion Multi-Function South Bridge
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5535-UDC Datasheet(HTML) 55 Page - National Semiconductor (TI)

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Global Concepts and Features (Continued)
3.3
TYPICAL CS5535 GEODELINK DEVICE
A typical or “generic” CS5535 GeodeLink Device (GLD) is
illustrated in Figure 3-4 along with internal and external
connections. The GLD consists of the Native Block (NB),
GeodeLink Adapter (GLA), MSRs, and Clock Control Units
(CCU). Each of these is discussed in the following para-
graphs.
Before going into the blocks of the typical device, it should
be noted that the following modules in CS5535 follow this
model very closely:
— AC97 Controller (ACC)
— ATA-5 Controller (ATAC)
— Diverse Device (DD)
Specifically, they all use the GLA.
The NB performs the “useful” work for the device. For
example, in a serial port device, the transmit parallel to
serial shift register is located in this block. The NB con-
nects to the outside world, that is, external devices, via the
I/O cells and pads. The NB contains registers that are
manipulated by software to perform the “work”. These are
operational registers that are typically manipulated by
device drivers. The NBs are covered in detail in the corre-
sponding GeodeLink Device register descriptions.
The GLA sits between the GLIU and the Local bus. The
Local bus is a traditional address/data bus supporting GLA
to NB transactions (slave transactions) and NB to GLA
transactions (master transactions). However, it is a single
transaction bus in that any given slave or master transac-
tion runs to completion before another transaction can
start. This is compatible with the NBs listed above (i.e.,
ACC, ATAC, and DD), which are all single transaction
devices. As suggested by Figure 3-4, the GLA contains no
registers and is strictly speaking, just a bridge.
The MSRs are conceptually separate from the NB and GLA
and generally provide overall GLD configuration and con-
trol. In most designs they are physically separated as
shown. There are six standard MSRs that are detailed in
Section 3.8 "Standard GeodeLink Device MSRs". All GLDs
have these standard MSRs. GLDs may also incorporate
additional MSRs as appropriate.
On the upper right of the figure, the connections between
the GLA and GLIU are illustrated. All of these signals were
covered previously in Section 3.1 "GeodeLink Architecture
Overview".
The Clock Control Units (CCU) are a key component in the
Active Hardware Clock Gating (AHCG) infrastructure. They
provide the mechanism for turning off clocks to sections of
logic that are Not Busy. Furthermore, they take an asyn-
chronous global reset signal and synchronize it to the appli-
cable clock domain.
Figure 3-4. Typical CS5535 GeodeLink Device
MSRs
Native
Block
(NB)
Native
Block
Registers
GL
Adapter
(GLA)
GLIU
MSRs
Reg In
Data In
Reg Out
Data Out
Diag
ASMI
ERR
Other Device
CCU
CCU
CCU
Local
Bus
Interface
Busy Signals
to GLCP
GL Device
Side-band signals to other Native Blocks
External Device Interface
I/O
Cells &
Pads
GL Clock
Local Bus Clock
Native Clock
Global internal_reset
Connections


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