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CS5535-UDC Datasheet(PDF) 19 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5535-UDC
Description  Geode??CS5535 I/O Companion Multi-Function South Bridge
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5535-UDC Datasheet(HTML) 19 Page - National Semiconductor (TI)

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Signal Definitions (Continued)
2.1
BALL ASSIGNMENTS
As illustrated in Figure 2-1 on page 18, the CS5535 is con-
figurable. Boot options and register programming are used
to set various modes of operation and specific signals on
specific balls.
This section describes the ball assignments and interface
options:
• Figure 2-2 "208-PBGA Ball Assignment Diagram" on
page 20:
— Top view looking through package.
• Table 2-2 "Ball Assignments: Sorted by Ball Number" on
page 21:
— Primary signal name is listed first.
— Includes a column labeled Buffer Type. See Section
2.1.1 "Buffer Types" on page 28 for details.
— Includes a column labeled Configuration with refer-
ences to:
– BOS[1:0] - See Section 2.1.2 "Boot Options" on
page 29.
– Ball Opt MSR - See Section 2.1.3 "Ball Options"
on page 29.
– AUX_IN, AUX_OUT_1, and AUX_OUT_2 - See
Section 2.2.8 "GPIOs" on page 42.
• Table 2-3 "Ball Assignments: Sorted Alphabetically by
Signal Name" on page 25:
— Quick-reference list, sorted alphabetically with
primary signal listed first.
The tables in this section use several abbreviations. Table
2-1 lists the mnemonics and their meanings.
Table 2-1. Abbreviations/Definitions
Mnemonic
Definition
A
Analog
AVSS
Analog Ground Connection
AVDD
Analog Power Connection
GND
Ground
I
Input
I/O
Bidirectional
O
Output
OD
Open-drain
Ball Opt MSR
Model Specific Register Ball Options: A register is used to configure balls with multiple functions.
Refer to Section 2.1.3 "Ball Options" on page 29 for further details.
PD
Pull-down resistor
PWR
Power
PU
Pull-up resistor
TS
TRI-STATE
VCORE
1.5V Core Power Working Connection
VCORE_VSB
1.5V Core Power Standby Connection
VIO
3.3V I/O Power Working Connection
VIO_VSB
3.3V I/O Power Standby Connection
VSS
Ground
#
The “#” symbol at the end of a signal name indicates that the active, or asserted state occurs when
the signal is at a low voltage level. When “#” is not present after the signal name, the signal is asserted
when at a high voltage level.
/
A “/” in a signal name indicates the function is always enabled (i.e., time multiplexed - available when
needed).
+
A “+” in a signal name indicates the function is available on the ball, but that either strapping options or
register programming is required to select the desired function.


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